Abstract:
A transmitter circuit includes a first driver circuit configured to drive an input/output pad in an integrated circuit device, the first driver circuit including a thin-oxide transistor configured to couple the input/output pad to a first voltage rail when the transmitter circuit is operated in a first mode; a gate pullup transistor configured to couple a gate of the thin-oxide transistor to a second voltage rail when voltage of a third voltage rail is collapsed to a zero-volt level; and a switch configured to block transmission of a gating signal to the gate of the thin-oxide transistor when the voltage of the third voltage rail is collapsed to the zero-volt level.
Abstract:
A memory interface circuit has a first differential receiver having a first input coupled to a first reference voltage source, a second differential receiver configured to receive a differential data strobe signal in a pair of complementary signals, a third differential receiver having a first input coupled to a second reference voltage source and a second input configured to receive one of the pair of complementary signals, a clock generation circuit configured to generate a read clock signal based on an output of the second differential receiver and using a qualifying signal output by the third differential receiver to qualify one or more edges in the read clock signal and a data capture circuit clocked by the read clock signal and configured to capture data from the output of the first differential receiver using the one or more edges in the read clock signal.
Abstract:
A hybrid output data path is provided that supports high-voltage signaling and low-voltage signaling. The high-voltage signaling is powered by a high-power supply voltage that is greater than a low-power supply voltage that powers the low-voltage signaling.
Abstract:
A hybrid output driver is disclosed that supports high-voltage signaling and low-voltage signaling. The high-voltage signaling is powered by a high-power supply voltage that is greater than a low-power supply voltage that powers the low-voltage signaling.
Abstract:
An ESD protection circuit in an interface circuit has a first diode coupled between a first power source of an integrated circuit device and an input/output pad of the integrated circuit device, a second diode coupled between a second power source of the integrated circuit device and the input/output pad, and a resistive element that couples the second diode to the first diode and to the input/output pad. The first power source supplies a driver circuit coupled to the input/output pad. The second power source supplies one or more core circuits of the integrated circuit device. The resistive element may be implemented as an interconnect configured to provide a resistance that produces a voltage differential between a terminal of the second diode and a corresponding terminal of the first diode during an electrostatic discharge event.
Abstract:
A hybrid output driver is disclosed that supports high-voltage signaling and low-voltage signaling. The high-voltage signaling is powered by a high-power supply voltage that is greater than a low-power supply voltage that powers the low-voltage signaling.
Abstract:
An aspect relates to an apparatus including a set of one or more receivers; a first replica circuit being a substantial replica of at least a portion of one of the set of one or more receivers; a first control circuit generates an output signal selectively coupled to an input of the first replica circuit; a second replica circuit being a substantial replica of at least a portion of one of the set of one or more receivers; a comparator including a first input coupled to a first output of the first replica circuit, a second input coupled to a second output of the second replica circuit, and an output; and a second control circuit including an input coupled to the output of the comparator, and an output coupled to the first replica circuit and to the set of one or more receivers.
Abstract:
An apparatus including a set of one or more receivers; a first replica circuit being a substantial replica of at least a portion of one of the set of one or more receivers; a first control circuit generates an output signal selectively coupled to an input of the first replica circuit; a second replica circuit being a substantial replica of at least a portion of one of the set of one or more receivers; a comparator including a first input coupled to a first output of the first replica circuit, a second input coupled to a second output of the second replica circuit, and an output; and a second control circuit including an input coupled to the output of the comparator, and an output coupled to the first replica circuit and to the set of one or more receivers.
Abstract:
Methods and devices are disclosed for enabling improved performance for page decodes on a SIM of a multi-SIM wireless communication device in which a shared radio frequency (RF) resource is used to read system information for a different SIM. After determining that a first SIM is using the shared RF resource to decode SIBs, the wireless device may receive information about an upcoming page decode time for monitoring a paging channel associated with the second SIM. The wireless device may obtain system information block (SIB) scheduling information associated with the first SIM, and may create a RF resource release gap during the system information read period based on the SIB scheduling information and the upcoming page decode time. Control of the RF resource may be released from the modem stack associated within the first SIM, and gained by a modem stack associated with the second SIM during the RF resource release gap.