SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20210358910A1

    公开(公告)日:2021-11-18

    申请号:US17384920

    申请日:2021-07-26

    Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.

    SEMICONDUCTOR DEVICE
    3.
    发明公开

    公开(公告)号:US20240030305A1

    公开(公告)日:2024-01-25

    申请号:US18199133

    申请日:2023-05-18

    CPC classification number: H01L29/42392 H01L29/0673 H01L29/775 H01L29/78696

    Abstract: The present disclosure provides for semiconductor devices including field effect transistors. In some embodiments, the semiconductor device includes active structures extending in a first direction on a substrate, an isolation pattern formed in a trench between the active structures, gate structures extending in a second direction across the active structures, a cutting insulation pattern formed between end portions of the gate structures in the second direction, and a lower impurity region at an upper portion of the isolation pattern. A first shape of a lower portion of the cutting insulation pattern disposed under an uppermost surface of the isolation pattern is different from a second shape of a lower portion of the gate structures disposed under the uppermost surface of the isolation pattern. The gate structures are formed on the active structures and the isolation pattern. The lower impurity region contacts at least a portion of the cutting insulation pattern.

    SEMICONDUCTOR DEVICE INCLUDING FIN FIELD EFFECT TRANSISTOR

    公开(公告)号:US20220223592A1

    公开(公告)日:2022-07-14

    申请号:US17705565

    申请日:2022-03-28

    Abstract: A semiconductor device includes a first gate pattern and a second gate pattern on a substrate, the first gate pattern and the second gate pattern being spaced apart from each other, and a separation pattern that separates the first gate pattern and the second gate pattern from each other. The first gate pattern includes a first high-k dielectric pattern and a first metal-containing pattern on the first high-k dielectric pattern, the first metal-containing pattern covering a sidewall of the first high-k dielectric pattern. The second gate pattern includes a second high-k dielectric pattern and a second metal-containing pattern on the second high-k dielectric pattern, and the separation pattern is in direct contact with the first metal-containing pattern and spaced apart from the first high-k dielectric pattern.

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