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    PROGRAMMING TO MINIMIZE CROSS-TEMPERATURE THRESHOLD VOLTAGE WIDENING
    1.
    发明申请
    PROGRAMMING TO MINIMIZE CROSS-TEMPERATURE THRESHOLD VOLTAGE WIDENING 有权

    公开(公告)号：US20210050054A1

    公开(公告)日：2021-02-18

    申请号：US16540862

    申请日：2019-08-14

    Applicant: SanDisk Technologies LLC

    Inventor： Biswajit Ray ,  Peter Rabkin ,  Mohan Dunga ,  Gerrit Jan Hemink ,  Changyuan Chen

    IPC: G11C11/56 ,  G11C11/406 ,  G11C11/4074 ,  G11C11/408

    Abstract: Apparatuses and techniques are provided for programming memory cells while reducing widening of a threshold voltage distribution due to changes in the temperature between the time of programming and the time of a subsequent read operation. One technique is based on a correlation between program speed and temperature coefficient (Tco). A different verify test is used for different memory cells which have a common assigned data state according to the program loop number and the temperature. Another technique is based on sensing the memory cells to measure their subthreshold slope and classifying the memory cells into groups. The sensing can occur as a separate operation before programming or as part of the programming of user data. The subsequent programming of the memory cells involves adjusting the verify test of each memory cell based on its group and the temperature.

    SYSTEMS AND METHODS FOR HIGH-PERFORMANCE WRITE OPERATIONS
    5.
    发明申请
    SYSTEMS AND METHODS FOR HIGH-PERFORMANCE WRITE OPERATIONS 审中-公开

    公开(公告)号：US20190180831A1

    公开(公告)日：2019-06-13

    申请号：US15967572

    申请日：2018-04-30

    Applicant: SanDisk Technologies LLC

    Inventor： Pitamber Shukla ,  Mohan Dunga ,  Anubhav Khandelwal

    IPC: G11C16/34 ,  G11C16/10 ,  G11C16/26 ,  G11C16/04 ,  G11C11/4074 ,  G11C29/52 ,  G06F3/06

    Abstract: A high-performance write operation to program data to a group of non-volatile memory cells may be completed in response to applying a single programming pulse to the group. Programming of the cells may be verified (and/or corrected) after completion of the command. Verifying programming of the cells may comprise identifying under-programmed cells, and applying an additional programming pulse to the identified cells. The under-programmed cells may comprise cells within an under-program range below a target level. The under-program range may be determined based on a threshold voltage distribution of the cells in response to applying the single programming pulse.

    ERASE SPEED BASED WORD LINE CONTROL
    7.
    发明申请
    ERASE SPEED BASED WORD LINE CONTROL 审中-公开

    公开(公告)号：US20170372789A1

    公开(公告)日：2017-12-28

    申请号：US15194295

    申请日：2016-06-27

    Applicant: SanDisk Technologies LLC

    Inventor： Biswajit Ray ,  Mohan Dunga ,  Gerrit Jan Hemink ,  Changyuan Chen

    IPC: G11C16/34 ,  G11C16/04 ,  G11C16/08 ,  G11C16/16

    CPC classification number: G11C16/3445 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/16

    Abstract: Apparatuses, systems, methods, and computer program products are disclosed for erase depth control. One apparatus includes a block of non-volatile storage cells. A controller is configured to perform a first erase operation on a block of non-volatile storage cells. A controller for a block is configured to determine a first set of storage cells of the block having a faster erase speed than a second set of storage cells of the block based on a verify voltage threshold. A controller for a block is configured to perform a second erase operation on the block using different voltages for a first set of storage cells and a second set of storage cells of the block.

    Wordline smart tracking verify
    9.
    发明授权
    Wordline smart tracking verify 有权

    公开(公告)号：US10971240B1

    公开(公告)日：2021-04-06

    申请号：US16726387

    申请日：2019-12-24

    Applicant: SanDisk Technologies LLC

    Inventor： Mohan Dunga ,  Pitamber Shukla

    IPC: G11C16/04 ,  G11C16/34 ,  G11C16/08 ,  G11C16/16 ,  G11C16/12

    Abstract: The storage device comprises a non-volatile memory coupled to a controller. The controller is configured to determine a first programming voltage by performing at least one program-verify iteration on a first word line using a voltage value which starts as a predetermined first initial voltage and is sequentially increased by a first voltage step amount following each failure to successfully program until the programming is completed. The controller is also configured to determine a second initial programming voltage by decreasing the first programming voltage by a second voltage step amount. The controller is further configured to perform at least one program-verify iteration on a second word line of the plurality of word lines using a voltage value which starts as the second initial programming voltage and is increased by the first voltage step amount following each sequential failure to successfully program until the programming is completed.

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