公开(公告)号：US20220246729A1

公开(公告)日：2022-08-04

申请号：US17565165

申请日：2021-12-29

Applicant: STMicroelectronics S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Edoardo ZANETTI ,  Alessia Maria FRAZZETTO ,  Alfio GUARNERA ,  Cateno Marco CAMALLERI ,  Antonio Giuseppe GRIMALDI

IPC: H01L29/16 ,  H01L21/04 ,  H01L29/10 ,  H01L21/265

Abstract: A vertical conduction MOSFET device includes a body of silicon carbide, which has a first type of conductivity and a face. A superficial body region of a second type of conductivity has a first doping level and extends into the body to a first depth , and has a first width. A source region of the first type of conductivity extends into the superficial body region to a second depth, and has a second width. The second depth is smaller than the first depth and the second width is smaller than the first width. A deep body region of the second type of conductivity has a second doping level and extends into the body, at a distance from the face of the body and in direct electrical contact with the superficial body region, and the second doping level is higher than the first doping level.

公开(公告)号：US20210151563A1

公开(公告)日：2021-05-20

申请号：US17096635

申请日：2020-11-12

Applicant: STMicroelectronics S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Edoardo ZANETTI ,  Alfio GUARNERA

IPC: H01L29/08 ,  H01L29/16

Abstract: A MOSFET device includes a semiconductor body having a first and a second face. A source terminal of the MOSFET device includes a doped region which extends at the first face of the semiconductor body and a metal layer electrically coupled to the doped region. A drain terminal extends at the second face of the semiconductor body. The doped region includes a first sub-region having a first doping level and a first depth, and a second sub-region having a second doping level and a second depth. At least one among the second doping level and the second maximum depth has a value which is higher than a respective value of the first doping level and the first maximum depth. The metal layer is in electrical contact with the source terminal exclusively through the second sub-region.

公开(公告)号：US20240071912A1

公开(公告)日：2024-02-29

申请号：US18450789

申请日：2023-08-16

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Laura Letizia SCALIA ,  Cateno Marco CAMALLERI ,  Edoardo ZANETTI ,  Alfio RUSSO

IPC: H01L23/525 ,  H01L23/29 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L23/5256 ,  H01L23/293 ,  H01L29/1608 ,  H01L29/66666 ,  H01L29/7827

Abstract: SiC-based MOSFET electronic device comprising: a solid body; a gate terminal, extending into the solid body; a conductive path, extending at a first side of the solid body, configured to be electrically couplable to a generator of a biasing voltage; a protection element of a solid-state material, coupled to the gate terminal and to the conductive path, the protection element forming an electronic connection between the gate terminal and the conductive path, and being configured to go from the solid state to a melted or gaseous state, interrupting the electrical connection, in response to a leakage current through the protection element greater than a critical threshold; a buried cavity in the solid body accommodating, at least in part, the protection element.

公开(公告)号：US20220344467A1

公开(公告)日：2022-10-27

申请号：US17741310

申请日：2022-05-10

Applicant: STMicroelectronics S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Edoardo ZANETTI ,  Alfio GUARNERA

IPC: H01L29/08 ,  H01L29/16

Abstract: A MOSFET device includes a semiconductor body having a first and a second face. A source terminal of the MOSFET device includes a doped region which extends at the first face of the semiconductor body and a metal layer electrically coupled to the doped region. A drain terminal extends at the second face of the semiconductor body. The doped region includes a first sub-region having a first doping level and a first depth, and a second sub-region having a second doping level and a second depth. At least one among the second doping level and the second maximum depth has a value which is higher than a respective value of the first doping level and the first maximum depth. The metal layer is in electrical contact with the source terminal exclusively through the second sub-region.

公开(公告)号：US20220246723A1

公开(公告)日：2022-08-04

申请号：US17579474

申请日：2022-01-19

Applicant: STMicroelectronics S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Alessia Maria FRAZZETTO ,  Edoardo ZANETTI ,  Alfio GUARNERA

IPC: H01L29/08 ,  H01L29/16 ,  H01L29/10 ,  H01L29/78 ,  H01L21/04 ,  H01L29/66

Abstract: A vertical conduction MOSFET device includes a body of silicon carbide having a first conductivity type and a face. A metallization region extends on the face of the body. A body region of a second conductivity type extends in the body, from the face of the body, along a first direction parallel to the face and along a second direction transverse to the face. A source region of the first conductivity type extends towards the inside of the body region, from the face of the body. The source region has a first portion and a second portion. The first portion has a first doping level and extends in direct electrical contact with the metallization region. The second portion has a second doping level and extends in direct electrical contact with the first portion of the source region. The second doping level is lower than the first doping level.

公开(公告)号：US20220208961A1

公开(公告)日：2022-06-30

申请号：US17559859

申请日：2021-12-22

Applicant: STMicroelectronics S.r.l.

Inventor： Patrick FIORENZA ,  Fabrizio ROCCAFORTE ,  Edoardo ZANETTI ,  Mario Giuseppe SAGGIO

IPC: H01L29/06 ,  H01L29/16 ,  H01L29/10 ,  H01L29/78 ,  H01L21/04 ,  H01L21/76 ,  H01L21/761 ,  H01L29/66

Abstract: A MOSFET transistor device includes a functional layer of silicon carbide, having a first conductivity type. Gate structures are formed on a top surface of the functional layer and each includes a dielectric region and an electrode region. Body wells having a second conductivity type are formed within the functional layer, and the body wells are separated from one another by surface-separation regions. Source regions having the first conductivity type are formed within the body wells, laterally and partially underneath respective gate structures. Modified-doping regions are arranged in the surface-separation regions centrally thereto, underneath respective gate structures, in particular underneath the corresponding dielectric regions, and have a modified concentration of dopant as compared to the concentration of the functional layer.

公开(公告)号：US20190172715A1

公开(公告)日：2019-06-06

申请号：US16209680

申请日：2018-12-04

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Edoardo ZANETTI ,  Simone RASCUNÁ ,  Mario Giuseppe SAGGIO ,  Alfio GUARNERA ,  Leonardo FRAGAPANE ,  Cristina TRINGALI

IPC: H01L21/04 ,  H01L21/285 ,  H01L29/66 ,  H01L29/16 ,  H01L29/872

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

公开(公告)号：US20240222424A1

公开(公告)日：2024-07-04

申请号：US18464141

申请日：2023-09-08

Applicant: STMicroelectronics S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Angelo MAGRI' ,  Edoardo ZANETTI ,  Alfio GUARNERA

IPC: H01L29/06 ,  H01L29/16

CPC classification number: H01L29/0607 ,  H01L29/1608

Abstract: An electronic device includes a semiconductor body of silicon carbide, and a body region at a first surface of the semiconductor body. A source region is disposed in the body region. A drain region is disposed at a second surface of the semiconductor body. A doped region extends seamlessly at the entire first surface of the semiconductor body and includes one or more first sub-regions having a first doping concentration and one or more second sub-regions having a second doping concentration lower than the first doping concentration. Thus, the device has zones alternated to each other having different conduction threshold voltage and different saturation current.

公开(公告)号：US20240162040A1

公开(公告)日：2024-05-16

申请号：US18509043

申请日：2023-11-14

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Edoardo ZANETTI ,  Simone RASCUNA' ,  Mario Giuseppe SAGGIO ,  Alfio GUARNERA ,  Leonardo FRAGAPANE ,  Cristina TRINGALI

IPC: H01L21/04 ,  H01L21/285 ,  H01L29/06 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78 ,  H01L29/872

CPC classification number: H01L21/046 ,  H01L21/0495 ,  H01L21/28537 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/66143 ,  H01L29/66734 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872 ,  H01L29/8725

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

公开(公告)号：US20210399089A1

公开(公告)日：2021-12-23

申请号：US17346771

申请日：2021-06-14

Applicant: STMicroelectronics S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Angelo MAGRI' ,  Edoardo ZANETTI ,  Alfio GUARNERA

IPC: H01L29/06 ,  H01L29/16

Abstract: An electronic device includes a semiconductor body of silicon carbide, and a body region at a first surface of the semiconductor body. A source region is disposed in the body region. A drain region is disposed at a second surface of the semiconductor body. A doped region extends seamlessly at the entire first surface of the semiconductor body and includes one or more first sub-regions having a first doping concentration and one or more second sub-regions having a second doping concentration lower than the first doping concentration. Thus, the device has zones alternated to each other having different conduction threshold voltage and different saturation current.