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公开(公告)号:US11417590B2
公开(公告)日:2022-08-16
申请号:US17108270
申请日:2020-12-01
Applicant: STMicroelectronics S.r.l.
Inventor: Federico Giovanni Ziglioli , Alberto Pintus , Pierangelo Magni
IPC: H01L23/495 , H01L21/48 , H01L21/56
Abstract: A plastic material substrate has a die mounting location for a semiconductor die. Metallic traces are formed on selected areas of the plastic material substrate, wherein the metallic traces provide electrically-conductive paths for coupling to the semiconductor die. The semiconductor die is attached onto the die mounting location. The semiconductor die attached onto the die mounting location is electrically bonded to selected ones of the metallic traces formed on the plastic material substrate. A package material is molded onto the semiconductor die attached onto the die mounting location.
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公开(公告)号:US11901250B2
公开(公告)日:2024-02-13
申请号:US17411585
申请日:2021-08-25
Applicant: STMicroelectronics S.r.l.
Inventor: Pierangelo Magni , Michele Derai
IPC: H01L23/495 , H01L23/31 , H01L21/56 , H01L23/18 , H01L23/498
CPC classification number: H01L23/3107 , H01L21/561 , H01L23/18 , H01L23/49838
Abstract: A semiconductor chip or die is mounted at a position on a support substrate. A light-permeable laser direct structuring (LDS) material is then molded onto the semiconductor chip positioned on the support substrate. The semiconductor chip is visible through the LDS material. Laser beam energy is directed to selected spatial locations of the LDS material to structure in the LDS material a pat gstern of structured formations corresponding to the locations of conductive lines and vias for making electrical connection to the semiconductor chip. The spatial locations of the LDS material to which laser beam energy is directed are selected as a function of the position the semiconductor chip which is visible through the LDS material, thus countering undesired effects of positioning offset of the chip on the substrate.
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公开(公告)号:US11842954B2
公开(公告)日:2023-12-12
申请号:US17887838
申请日:2022-08-15
Applicant: STMicroelectronics S.r.l.
Inventor: Federico Giovanni Ziglioli , Alberto Pintus , Pierangelo Magni
IPC: H01L23/495 , H01L21/48 , H01L21/56
CPC classification number: H01L23/49586 , H01L21/481 , H01L21/4825 , H01L21/565 , H01L23/49506
Abstract: A plastic material substrate has a die mounting location for a semiconductor die. Metallic traces are formed on selected areas of the plastic material substrate, wherein the metallic traces provide electrically-conductive paths for coupling to the semiconductor die. The semiconductor die is attached onto the die mounting location. The semiconductor die attached onto the die mounting location is electrically bonded to selected ones of the metallic traces formed on the plastic material substrate. A package material is molded onto the semiconductor die attached onto the die mounting location.
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公开(公告)号:US09324627B2
公开(公告)日:2016-04-26
申请号:US14258818
申请日:2014-04-22
Applicant: STMicroelectronics S.r.l.
Inventor: Pierangelo Magni , Giuseppe Gattavari , Mark Andrew Shaw
CPC classification number: H01L23/34 , H01L23/3107 , H01L23/49541 , H01L24/80 , H01L2224/48091 , H01L2224/48227 , H01L2224/48245 , H01L2224/48247 , H01L2924/12042 , H01L2924/181 , H05K1/183 , H05K3/306 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
Abstract: An embodiment of an electronic assembly for mounting on an electronic board includes a plurality of electric contact regions exposed on a mounting surface of the electronic board. The electronic assembly includes a chip of semiconductor material in which at least one electronic component is integrated, at least one support element including a first main surface and a second main surface opposite to the first main surface, the chip being enclosed by the at least one support element, a heat dissipation plate thermally coupled to said chip to dissipate the heat produced by it, exposed on the first main surface of the support element, a plurality of contact elements, each electrically coupled to a respective electric terminal of the electronic component integrated in the chip, exposed on the same first main surface of which is exposed to the dissipation plate. Also included are a plurality of electric connection elements, each adapted to electrically intercouple a respective contact element of the electronic assembly with a corresponding electric contact region of the electronic board, in such a way that the second main surface of the at least one support element faces the mounting surface of the electronic board.
Abstract translation: 用于安装在电子板上的电子组件的实施例包括暴露在电子板的安装表面上的多个电接触区域。 电子组件包括其中集成有至少一个电子部件的半导体材料芯片,包括第一主表面和与第一主表面相对的第二主表面的至少一个支撑元件,芯片被至少一个 支撑元件,热耦合到所述芯片以散发由其产生的热量的散热板,暴露在支撑元件的第一主表面上,多个接触元件,每个接触元件电耦合到电子元件的相应电气端子集成 在芯片中,暴露在与其散开板相同的第一主表面上。 还包括多个电连接元件,每个电连接元件适于将电子组件的相应接触元件与电子板的对应电接触区域电相互耦合,使得至少一个支撑元件的第二主表面 面向电子板的安装表面。
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公开(公告)号:US20160005678A1
公开(公告)日:2016-01-07
申请号:US14744766
申请日:2015-06-19
Applicant: STMicroelectronics S.r.l.
Inventor: Pierangelo Magni , Roberto Rossi
IPC: H01L23/495 , H01L21/48
CPC classification number: H01L23/49527 , H01L21/4825 , H01L23/481 , H01L23/49503 , H01L23/4952 , H01L23/49531 , H01L23/49541 , H01L24/45 , H01L24/48 , H01L2224/05554 , H01L2224/48227 , H01L2924/00014 , H01L2924/181 , H01L2924/19105 , H01L2924/19107 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: An electronic device includes a chip and a support element which supports the chip. Leads are provided to be electrically coupled to at least one terminal of the chip. A coupling element is mounted to a free region of the support element that is not occupied by the chip. The coupling element includes a conductive portion electrically connected to at least one lead and to the at least one terminal of the chip to obtain an electrical coupling.
Abstract translation: 电子设备包括芯片和支撑芯片的支撑元件。 引线被提供以电耦合到芯片的至少一个端子。 耦合元件安装到不被芯片占据的支撑元件的自由区域。 耦合元件包括电连接到芯片的至少一个引线和至少一个端子的导电部分,以获得电耦合。
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公开(公告)号:US11552024B2
公开(公告)日:2023-01-10
申请号:US16990748
申请日:2020-08-11
Applicant: STMicroelectronics S.r.l.
Inventor: Federico Giovanni Ziglioli , Alberto Pintus , Michele Derai , Pierangelo Magni
Abstract: A method of manufacturing semiconductor devices, such as integrated circuits includes arranging one or more semiconductor dice on a support surface. Laser direct structuring material is molded onto the support surface having the semiconductor die/dice arranged thereon. Laser beam processing is performed on the laser direct structuring material molded onto the support surface having the semiconductor die/dice arranged thereon to provide electrically conductive formations for the semiconductor die/dice arranged on the support surface. The semiconductor die/dice provided with the electrically-conductive formations are separated from the support surface.
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公开(公告)号:US11462465B2
公开(公告)日:2022-10-04
申请号:US16837565
申请日:2020-04-01
Applicant: STMicroelectronics S.r.l.
Inventor: Pierangelo Magni
IPC: H01L23/498 , H01L21/48
Abstract: Leadframes for semiconductor devices are manufactured by providing a laminar substrate of laser direct structuring material, the laminar substrate comprising first and second opposed surfaces, applying laser beam processing to the substrate to provide a first pattern of electrically-conductive formations at the first surface, a second pattern of electrically-conductive formations at the second surface and electrically-conductive vias through the substrate between the first surface and the second surface. Electrically-conductive material is formed, for instance via electrolytic or electroless growth of electrically-conductive material such a copper onto the first and second pattern of electrically-conductive formations as well as onto the electrically-conductive vias provided by applying laser beam processing to the substrate. The electrically-conductive vias are coupled to one or both of the electrically-conductive formations in the first pattern of electrically-conductive formations and the second pattern of electrically-conductive formations.
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公开(公告)号:US10522504B2
公开(公告)日:2019-12-31
申请号:US15175930
申请日:2016-06-07
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Pierangelo Magni , Alberto Arrigoni
IPC: H01L23/00
Abstract: In an embodiment, a semiconductor device includes: a mounting substrate having electrically conductive formations thereon, a semiconductor die coupled with the mounting substrate, the semiconductor die with electrical contact pillars facing towards the mounting substrate, an anisotropic conductive membrane between the semiconductor die and the mounting substrate, the membrane compressed between the electrical contact pillars and the mounting substrate to provide electrical contact between the electrical contact pillars of the semiconductor die and the electrically conductive formations on the mounting substrate.
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公开(公告)号:US10141240B2
公开(公告)日:2018-11-27
申请号:US15675483
申请日:2017-08-11
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Pierangelo Magni
IPC: H01L23/00 , H01L23/367 , H01L23/373
Abstract: A semiconductor device includes a layered package having a semiconductor die embedded therein, the semiconductor die coupled with a thermally-conductive element. The layered package includes, e.g., PCB boards with an intermediate layer having the semiconductor die arranged therein, and a pair of outer layers, with the thermally-conductive element including a thermally-conductive inlay in one of the outer layers.
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公开(公告)号:US09324639B2
公开(公告)日:2016-04-26
申请号:US14744766
申请日:2015-06-19
Applicant: STMicroelectronics S.r.l.
Inventor: Pierangelo Magni , Roberto Rossi
CPC classification number: H01L23/49527 , H01L21/4825 , H01L23/481 , H01L23/49503 , H01L23/4952 , H01L23/49531 , H01L23/49541 , H01L24/45 , H01L24/48 , H01L2224/05554 , H01L2224/48227 , H01L2924/00014 , H01L2924/181 , H01L2924/19105 , H01L2924/19107 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: An electronic device includes a chip and a support element which supports the chip. Leads are provided to be electrically coupled to at least one terminal of the chip. A coupling element is mounted to a free region of the support element that is not occupied by the chip. The coupling element includes a conductive portion electrically connected to at least one lead and to the at least one terminal of the chip to obtain an electrical coupling.
Abstract translation: 电子设备包括芯片和支撑芯片的支撑元件。 引线被提供以电耦合到芯片的至少一个端子。 耦合元件安装到不被芯片占据的支撑元件的自由区域。 耦合元件包括电连接到芯片的至少一个引线和至少一个端子的导电部分,以获得电耦合。
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