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    Omni-directional wheel and moving device including the same
    2.
    发明授权
    Omni-directional wheel and moving device including the same 有权

    公开(公告)号：US11453237B2

    公开(公告)日：2022-09-27

    申请号：US16672749

    申请日：2019-11-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Wonjun Choi ,  Jaewook Lee ,  Jongsik Won ,  Jaewon Yoo ,  Jungdae Heo ,  Seungbohm Hong

    IPC: B60B19/00 ,  B60B19/12

    Abstract: An omni-directional wheel includes: a center wheel configured to rotate about a first rotation axis extending in a first direction; a plurality of peripheral wheels arranged along a circumference of the center wheel and configured to rotate about a second rotation axis extending in a second direction different from the first direction; and a plurality of variable supports provided on the center wheel and configured to respectively support the plurality of peripheral wheels. At least one of the plurality of variable supports is configured to absorb, when an impact force is applied to at least one of the plurality of peripheral wheels being supported by the at least one of the plurality of variable supports, the impact by changing a distance between the center wheel and the at least one of the plurality of peripheral wheels.

    Memory system and computing system including the same
    4.
    发明授权
    Memory system and computing system including the same 有权

    公开(公告)号：US12153529B2

    公开(公告)日：2024-11-26

    申请号：US18110582

    申请日：2023-02-16

    Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY

    Inventor： Kiseok Oh ,  Jaewook Lee ,  Wenjing Jin ,  Jongsung Lee ,  Juyun Jung

    IPC: G06F12/00 ,  G06F12/02 ,  G06F12/0873 ,  G06F13/16 ,  G06F13/42

    Abstract: A memory system includes a memory resource and a smart controller. The memory resource includes semiconductor memory devices, the semiconductor memory devices are divided into a first semiconductor memory and a second semiconductor memory for each of a plurality of channels, and the first semiconductor memory the second semiconductor memory belong to different ranks. The smart controller, connected to the semiconductor memory devices through the channels, controls the semiconductor memory devices by communicating a plurality of hosts through a compute express link (CXL) interface, and each of the plurality of hosts drives at least one virtual machine. The smart controller controls a power mode of the memory resource by managing an idle memory region from among a plurality of memory regions of the plurality of semiconductor memory devices at a rank level without intervention of the plurality of hosts, the plurality of memory regions storing data.

    Hammer refresh row address detector, and semiconductor memory device and memory module including the same
    8.
    发明授权
    Hammer refresh row address detector, and semiconductor memory device and memory module including the same 有权

    公开(公告)号：US11568917B1

    公开(公告)日：2023-01-31

    申请号：US17504705

    申请日：2021-10-19

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hoon Shin ,  Yeonhong Park ,  Jaewook Lee ,  Eojin Lee ,  Woosuk Kwon ,  Jungho Ahn ,  Taejun Ham

    IPC: G11C11/4078

    Abstract: A hammer refresh row address detector includes a control logic unit that receives a row address applied along with an active command, to increase a hit count stored in a corresponding entry when the row address is present in candidate aggressor row addresses stored in n entries. The control logic determines a candidate aggressor row address stored in an entry in which the hit count equals a threshold value to be a target aggressor row address. The control logic generates a victim row address adjacent to the target aggressor row address as a hammer refresh row address to accompany a hammer refresh command. The control logic increases the miss count value when the row address is not present in the candidate aggressor row addresses stored in the n entries and no hit count within the n entries is identical to the miss count value.

    METHOD AND APPARATUS FOR SELECTING CHANNEL IN WIRELESS COMMUNICATION SYSTEM
    9.
    发明申请
    METHOD AND APPARATUS FOR SELECTING CHANNEL IN WIRELESS COMMUNICATION SYSTEM 审中-公开
    在无线通信系统中选择通道的方法和装置

    公开(公告)号：US20170026970A1

    公开(公告)日：2017-01-26

    申请号：US15216618

    申请日：2016-07-21

    Applicant: Samsung Electronics Co., Ltd ,  Korea University Research and Business Foundation

    Inventor： Sangheon Pack ,  Haneul Ko ,  Jaewook Lee

    IPC: H04W72/04

    CPC classification number: H04W48/18 ,  H04W16/10 ,  H04W72/0426 ,  H04W72/0453

    Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE), a method for operating of an AP includes receiving a signal from at least one adjacent AP, generating information regarding each of channels based on the received signal, generating respective expected values by considering at least one channel to be involved in channel bonding, based on the information regarding each of the channels, and selecting a channel based on the respective expected values. An apparatus includes a controller configured to generate respective expected values for each of the channels and select a channel based on the respective expected values.

    Abstract translation: 本公开涉及提供用于支持更高数据速率的前5代（5G）或5G通信系统超越第四代（4G）通信系统，例如长期演进（LTE），用于操作 AP包括从至少一个相邻AP接收信号，基于接收到的信号产生关于每个信道的信息，基于关于每个信道的信息，通过考虑至少一个信道参与信道绑定来产生相应的期望值 ，以及基于相应的期望值选择频道。 一种装置包括：控制器，被配置为产生每个信道的相应期望值，并且基于相应的期望值选择信道。

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