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    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20160343709A1

    公开(公告)日：2016-11-24

    申请号：US15159464

    申请日：2016-05-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sungmin Kim ,  Jisu Kang ,  Jaehyun Park ,  Heonjong Shin ,  Yuri Lee

    IPC: H01L27/088 ,  H01L29/10 ,  H01L29/06 ,  H01L29/78 ,  H01L29/417

    CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/088 ,  H01L29/0653 ,  H01L29/1037 ,  H01L29/41791 ,  H01L29/785

    Abstract: A semiconductor device includes a first active region and a second active region, which are disposed in a semiconductor substrate and have side surfaces facing each other, an isolation pattern disposed between the first and second active regions, a semiconductor extension layer disposed between the first and second active regions, a first source/drain semiconductor layer disposed on the first active region, and a second source/drain semiconductor layer disposed on the second active region. The facing side surfaces of the first and second active regions are closer to the semiconductor extension layer than the isolation pattern.

    Abstract translation: 半导体器件包括第一有源区和第二有源区，它们设置在半导体衬底中并且具有彼此面对的侧表面，设置在第一和第二有源区之间的隔离图案，设置在第一和第二有源区之间的半导体延伸层， 第二有源区，设置在第一有源区上的第一源/漏半导体层和设置在第二有源区上的第二源/漏半导体层。 第一和第二有源区的面对侧表面比隔离图案更靠近半导体延伸层。

    CLOCK GENERATING CIRCUIT AND METHOD FOR TRIMMING PERIOD OF OSCILLATOR CLOCK SIGNAL
    4.
    发明申请
    CLOCK GENERATING CIRCUIT AND METHOD FOR TRIMMING PERIOD OF OSCILLATOR CLOCK SIGNAL 有权

    公开(公告)号：US20220404859A1

    公开(公告)日：2022-12-22

    申请号：US17841078

    申请日：2022-06-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyunil Kim ,  Jisu Kang ,  Taewook Park ,  Hongmook Choi

    IPC: G06F1/10 ,  G06F1/12

    Abstract: A clock generating circuit includes an oscillator, a clock counter, a finite state machine, and a non-volatile memory. The oscillator outputs an oscillator clock signal having a period based on a trim value. The clock counter counts the oscillator clock signal for a reference time. The finite state machine obtains the count value of the counted oscillator clock signal from the clock counter, and in a test mode, compares the count value with a target count value and changes the trim value based on the comparison result and determines a final trim value based on the changed trim value. The non-volatile memory stores the final trim value that is determined.

    Storage device including mapping memory and method of operating the same
    7.
    发明授权
    Storage device including mapping memory and method of operating the same 有权

    公开(公告)号：US12164376B2

    公开(公告)日：2024-12-10

    申请号：US18148061

    申请日：2022-12-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Eunhye Oh ,  Taewook Park ,  Jisu Kang ,  Yongki Lee

    IPC: G06F11/10 ,  G06F11/07

    Abstract: Provided is a storage device including a memory device configured to store original data; and a controller configured to control the memory device, the controller including a first error correction circuit configured to correct an error of the original data, and a second error correction circuit configured to correct an error of the original data, a maximum number of correctable error bits of the second error correction circuit being greater than a maximum number of correctable error bits of the first error correction circuit, a mapping memory configured to store at least some of parity bits generated by the second error correction circuit and store an address of the memory device at which the original data is stored; and a control block configured to control the first error correction circuit, the second error correction circuit, and the mapping memory.

    SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE AND SEPARATION STRUCTURE
    9.
    发明公开
    SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE AND SEPARATION STRUCTURE 审中-公开

    公开(公告)号：US20240079467A1

    公开(公告)日：2024-03-07

    申请号：US18296209

    申请日：2023-04-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jeewoong Kim ,  Jisu Kang ,  Hojun Kim

    IPC: H01L29/423 ,  H01L29/06 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

    CPC classification number: H01L29/42392 ,  H01L29/0673 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696

    Abstract: A semiconductor device includes active regions, including a first active region and a second active region, extending in a first horizontal direction, an isolation region defining the active regions, a gate structure disposed on the isolation region and extending in a second horizontal direction to intersect the active region, and separation structures penetrating through the gate structure and disposed on the isolation region between the first active region and the second active region. The separation structures include a first separation structure extending into the isolation region, and a second separation structure disposed on the first separation structure and penetrating through at least a portion of the first separation structure, and a width of a lower region of the second separation structure in the second horizontal direction is less than a width of an upper region of the first separation structure in the second horizontal direction.

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