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    Layout design system, semiconductor device fabricated by using the system and method for fabricating the semiconductor device
    1.
    发明授权
    Layout design system, semiconductor device fabricated by using the system and method for fabricating the semiconductor device 有权
    布局设计系统，通过使用该系统制造的半导体器件和用于制造半导体器件的方法

    公开(公告)号：US09576953B2

    公开(公告)日：2017-02-21

    申请号：US14488628

    申请日：2014-09-17

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kang-Hyun Baek ,  Jin-Hyun Noh ,  Tae-Joong Song ,  Gi-Young Yang ,  Sang-Kyu Oh

    IPC: H01L27/088 ,  H01L29/417 ,  H01L29/78 ,  H01L27/11 ,  G06F17/50

    CPC classification number: H01L27/0886 ,  G06F17/5068 ,  H01L27/1104 ,  H01L29/785 ,  H01L29/7851

    Abstract: A layout design system for designing a semiconductor device includes a processor, a storage module storing an intermediate design, and a correction module used by the processor to correct the intermediate design. The intermediate design includes an active region and dummy designs on the active region. Each dummy design includes a dummy structure and dummy spacers disposed at opposite sides of the dummy structure. The correction module is configured to alter widths of regions of at least some of the dummy designs. The corrected design is used to produce a semiconductor device having an active fin, a hard mask layer disposed on the active fin, a gate structure crossing the over the hard mask layer, and a spacer disposed on at least one side of the gate structure. The hard mask layer, and the active fin, are provided with widths that vary due to the dummy designs.

    Abstract translation: 用于设计半导体器件的布局设计系统包括处理器，存储中间设计的存储模块和由处理器用于校正中间设计的校正模块。 中间设计包括有源区域和有源区域的虚拟设计。 每个虚拟设计包括虚拟结构和设置在虚拟结构的相对侧的虚设间隔物。 校正模块被配置为改变至少一些虚拟设计的区域的宽度。 校正后的设计用于制造具有活性鳍片，设置在活性鳍片上的硬掩模层，与硬掩模层之间交叉的栅极结构以及设置在栅极结构的至少一侧上的间隔物的半导体器件。 硬掩模层和活动翅片具有由于虚拟设计而变化的宽度。

    Methods of manufacturing semiconductor devices using masks having varying widths
    2.
    发明授权
    Methods of manufacturing semiconductor devices using masks having varying widths 有权
    使用具有不同宽度的掩模制造半导体器件的方法

    公开(公告)号：US09324832B1

    公开(公告)日：2016-04-26

    申请号：US14856666

    申请日：2015-09-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kang-Hyun Baek ,  Kwan-Jae Song ,  Jong-Sung Jeon

    IPC: H01L21/3205 ,  H01L29/66 ,  H01L29/06

    CPC classification number: H01L29/66545 ,  H01L29/66795 ,  H01L29/66818

    Abstract: In a method, a dummy gate layer structure and a mask layer are formed on a substrate. The mask layer is patterned to form masks. Spacers are formed on sidewalls of the mask. A dummy gate mask is formed between the spacers. The dummy gate layer structure is patterned using the dummy gate mask to form dummy gate structures. The dummy gate structure is replaced with a gate structure. When the mask is formed, an initial layout of masks extending in a first direction is designed. An offset bias in a second direction is provided for a specific region of the initial layout to design a final layout having a width in the second direction varying along the first direction. The mask layer is patterned according to the final layout to form the masks having a width varying along the first direction.

    Abstract translation: 在一种方法中，在基板上形成伪栅极层结构和掩模层。 将掩模层图案化以形成掩模。 垫片形成在面罩的侧壁上。 在间隔件之间形成虚拟栅极掩模。 使用伪栅极掩模对虚拟栅极层结构进行图案化以形成伪栅极结构。 虚拟栅极结构被栅极结构代替。 当形成掩模时，设计沿第一方向延伸的掩模的初始布局。 针对初始布局的特定区域提供第二方向上的偏移偏移，以设计沿着第一方向具有沿第二方向的宽度变化的最终布局。 根据最终布局图案化掩模层以形成具有沿着第一方向变化的宽度的掩模。

    SEMICONDUCTOR DESIGN AUTOMATION SYSTEM AND COMPUTING SYSTEM INCLUDING THE SAME
    4.
    发明申请
    SEMICONDUCTOR DESIGN AUTOMATION SYSTEM AND COMPUTING SYSTEM INCLUDING THE SAME 有权

    公开(公告)号：US20220138397A1

    公开(公告)日：2022-05-05

    申请号：US17395594

    申请日：2021-08-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Song-Yi Han ,  Jae Min Kim ,  Jae Ho Kim ,  Ji-Seong Doh ,  Kang-Hyun Baek ,  Young Kyou Shin ,  Seong Hun Jang ,  Young Jun Cho ,  Yun Ji Choi

    IPC: G06F30/398 ,  G06F30/12

    Abstract: A semiconductor design automation system comprises a simulator configured to generate simulation data, a recovery module configured to correct a sampling error of the simulation data to generate recovery simulation data, a hardware data module configured to generate real data, a preprocessing module configured to preprocess the real data to generate preprocessed real data, a database configured to store the recovery simulation data and the preprocessed real data, a first graphic user interface including an automatic simulation generator configured to generate a machine learning model of the recovery simulation data and the preprocessed real data and generate predicted real data therefrom, and a second graphic user interface including a visualization unit configured to generate a visualized virtualization process result from the machine learning model.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    6.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20150137262A1

    公开(公告)日：2015-05-21

    申请号：US14465968

    申请日：2014-08-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kang-Hyun Baek ,  Sung-Hyun Park ,  Sang-Hoon Baek ,  Tae-Joong Song

    IPC: H01L29/78 ,  H01L27/11

    CPC classification number: H01L29/785 ,  H01L27/0207 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1211 ,  H01L29/0696 ,  H01L29/4238 ,  H01L29/66795 ,  H01L29/66818

    Abstract: A semiconductor device includes: active fins protruding from an active layer and extending in a first direction; a gate structure on the active fins extending in a second direction intersecting the first direction; and a spacer on at least one side of the gate structure, wherein each of the active fins includes a first region and a second region adjacent to the first direction in the first direction, and a width of the first region in the second direction is different from a width of the second region in the second direction.

    Abstract translation: 半导体器件包括：从有源层突出并沿第一方向延伸的有源鳍; 主动翅片上的栅极结构沿与第一方向相交的第二方向延伸; 以及在所述栅极结构的至少一侧上的间隔物，其中所述活性鳍片中的每一个包括第一区域和与所述第一方向上的所述第一方向相邻的第二区域，并且所述第一区域在所述第二方向上的宽度不同 从第二方向的第二区域的宽度。

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