公开(公告)号：US10727349B2

公开(公告)日：2020-07-28

申请号：US16426819

申请日：2019-05-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Soo Kim ,  Dong Hyun Roh ,  Koung Min Ryu ,  Sang Jin Hyun

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/66 ,  H01L29/423 ,  H01L27/092 ,  H01L27/12

Abstract: A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.

公开(公告)号：US12211846B2

公开(公告)日：2025-01-28

申请号：US18415863

申请日：2024-01-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Soo Kim ,  Gi Gwan Park ,  Jung Hun Choi ,  Koung Min Ryu ,  Sun Jung Lee

IPC: H01L27/088 ,  H01L21/8234 ,  H01L23/485 ,  H01L23/528 ,  H01L27/092 ,  H01L29/423 ,  H01L29/739

Abstract: A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film.

公开(公告)号：US10347763B2

公开(公告)日：2019-07-09

申请号：US15697678

申请日：2017-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Soo Kim ,  Dong Hyun Roh ,  Koung Min Ryu ,  Sang Jin Hyun

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/66 ,  H01L29/423 ,  H01L27/092 ,  H01L27/12

Abstract: A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.

公开(公告)号：US11908858B2

公开(公告)日：2024-02-20

申请号：US16937912

申请日：2020-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Soo Kim ,  Gi Gwan Park ,  Jung Hun Choi ,  Koung Min Ryu ,  Sun Jung Lee

IPC: H01L27/088 ,  H01L21/8234 ,  H01L23/485 ,  H01L23/528 ,  H01L29/423 ,  H01L27/092 ,  H01L29/739

CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L21/823456 ,  H01L21/823475 ,  H01L23/485 ,  H01L23/5283 ,  H01L29/42364 ,  H01L29/42372 ,  H01L27/0924 ,  H01L29/7391

Abstract: A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film.

公开(公告)号：US20180254338A1

公开(公告)日：2018-09-06

申请号：US15697678

申请日：2017-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Soo Kim ,  Dong Hyun Roh ,  Koung Min Ryu ,  Sang Jin Hyun

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/417

CPC classification number: H01L29/785 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/41791 ,  H01L29/42376 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L2029/7858

Abstract: A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.

公开(公告)号：US10854754B2

公开(公告)日：2020-12-01

申请号：US16932076

申请日：2020-07-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Soo Kim ,  Dong Hyun Roh ,  Koung Min Ryu ,  Sang Jin Hyun

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/66 ,  H01L29/423 ,  H01L27/12 ,  H01L27/092

Abstract: A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.

公开(公告)号：US10763254B2

公开(公告)日：2020-09-01

申请号：US15333545

申请日：2016-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Soo Kim ,  Gi Gwan Park ,  Jung Hun Choi ,  Koung Min Ryu ,  Sun Jung Lee

IPC: H01L27/088 ,  H01L21/8234 ,  H01L23/485 ,  H01L23/528 ,  H01L29/423 ,  H01L27/092 ,  H01L29/739

Abstract: A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film.

公开(公告)号：US20230326964A1

公开(公告)日：2023-10-12

申请号：US18056736

申请日：2022-11-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bong Kwan Baek ,  Jun Hyuk Lim ,  Jung Hwan Chun ,  Kyu-Hee Han ,  Jong Min Baek ,  Koung Min Ryu ,  Jung Hoo Shin ,  Sang Shin Jang

IPC: H01L29/06 ,  H01L29/417 ,  H01L29/786 ,  H01L29/778

CPC classification number: H01L29/0673 ,  H01L29/778 ,  H01L29/78696 ,  H01L29/41733

Abstract: Semiconductor devices with improved performance and reliability and methods for forming the same are provided. The semiconductor devices include an active pattern extending in a first direction, gate structures spaced apart from each other in the first direction on the active pattern, a source/drain pattern on the active pattern, a source/drain contact on the source/drain pattern, and a contact liner extending along a sidewall of the source/drain contacts. A carbon concentration of the contact liner at a first point of the contact liner is different from a carbon concentration of the contact liner at a second point of the contact liner, and the first point is at a first height from an upper surface of the active pattern, the second point is at a second height from the upper surface of the active pattern, and the first height is smaller than the second height.

公开(公告)号：US20190280116A1

公开(公告)日：2019-09-12

申请号：US16426819

申请日：2019-05-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Soo Kim ,  Dong Hyun Roh ,  Koung Min Ryu ,  Sang Jin Hyun

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L29/423

Abstract: A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.

公开(公告)号：US10128240B2

公开(公告)日：2018-11-13

申请号：US15807012

申请日：2017-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun Ki Min ,  Sang Koo Kang ,  Koung Min Ryu ,  Gi Gwan Park

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/311 ,  H01L21/8234 ,  H01L23/535 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device includes a substrate including first to third regions, wherein the third region is positioned in a first direction between the first and second regions, a fin protruding on the substrate and extending in the first direction, first and second gate structures respectively formed on the fin in the first and second regions, first and second spacers formed with spacing apart from each other on the fin in the third region. The first and second spacers are sloped in a direction away from each other, and the first and second spacers and an upper surface of the fin define a plurality of acute angles, the first and second spacers defining a recess, the fin and the first and second spacers defining sidewalls of the recess, and a device isolating film substantially filling the recess.