Semiconductor device including transistors with different threshold voltages

    公开(公告)号:US10068901B2

    公开(公告)日:2018-09-04

    申请号:US15413680

    申请日:2017-01-24

    摘要: A semiconductor device including a substrate includes a first region and a second region and first and second transistors in the first and second regions, respectively. The first transistor includes a first gate insulating layer on the substrate, a first lower TiN layer on and in contact with the first gate insulating layer, a first etch-stop layer on the first lower TiN layer and a first upper gate electrode on the first etch-stop layer. The second transistor includes a second gate insulating layer on the substrate, a second lower TiN layer on and in contact with the second gate insulating layer, a second etch-stop layer on the second lower TiN layer and a second upper gate electrode on the second etch-stop layer. A thickness of the first lower TiN layer is less than a thickness of the second lower TiN layer.

    Method for fabricating semiconductor device

    公开(公告)号:US10332797B2

    公开(公告)日:2019-06-25

    申请号:US15480605

    申请日:2017-04-06

    摘要: A method for fabricating a semiconductor device includes forming first gate stacks on a first region of a substrate to be spaced apart by a first distance, forming second gate stacks on a second region of the substrate to be spaced apart by a second distance greater than the first distance, forming a first blocking film along the first gate stacks and the substrate, a thickness of the first blocking film between the first gate stacks being a first thickness, forming a second blocking film along the second gate stacks and the substrate, a thickness of the second blocking film between the second gate stacks being a second thickness different from the first thickness, and removing the first blocking film, the second blocking film, and the substrate to form a first recess between the first gate stacks and a second recess between the second gate stacks.

    Semiconductor device and fabricating method thereof

    公开(公告)号:US10224343B2

    公开(公告)日:2019-03-05

    申请号:US15869599

    申请日:2018-01-12

    摘要: There is provided a semiconductor device capable of enhancing device performance by variably adjusting threshold voltage of a transistor having gate-all-around structure. The semiconductor device includes a substrate including a first region and a second region, a first wire pattern provided on the first region of the substrate and spaced apart from the substrate, a second wire pattern provided on the second region of the substrate and spaced apart from the substrate, a first gate insulating film surrounding a perimeter of the first wire pattern, a second gate insulating film surrounding a perimeter of the second wire pattern, a first gate electrode provided on the first gate insulating film, intersecting with the first wire pattern, and including a first metal oxide film therein, a second gate electrode provided on the second gate insulating film and intersecting with the second wire pattern, a first gate spacer on a sidewall of the first gate electrode, and a second gate spacer on a sidewall of the second gate electrode.

    Semiconductor devices with source/drain stress liner

    公开(公告)号:US10043903B2

    公开(公告)日:2018-08-07

    申请号:US15384587

    申请日:2016-12-20

    摘要: A semiconductor device includes a substrate including a first region and a second region, a first fin-type pattern in the first region, a second fin-type pattern in the second region, a first gate structure intersecting the first fin-type pattern, the first gate structure including a first gate spacer, a second gate structure intersecting the second fin-type pattern, the second gate structure including a second gate spacer, a first epitaxial pattern formed on opposite sides of the first gate structure, on the first fin-type pattern, the first epitaxial pattern having a first impurity, a second epitaxial pattern formed on opposite sides of the second gate structure, on the second fin-type pattern, the second epitaxial pattern having a second impurity, a first silicon nitride film extending along a sidewall of the first gate spacer, and a first silicon oxide film extending along a sidewall of the first gate spacer.