公开(公告)号：US20210257474A1

公开(公告)日：2021-08-19

申请号：US17039083

申请日：2020-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： In Yeal LEE ,  Ju Youn KIM ,  Jin-Wook KIM ,  Ju Hun PARK ,  Deok Han BAE ,  Myung Yoon UM

IPC: H01L29/423 ,  H01L23/522 ,  H01L23/528 ,  H01L29/49

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, and a gate contact in the gate structure. The gate structure includes a gate electrode extending in a first direction and a gate capping pattern on the gate electrode. The gate contact is connected to the gate electrode. The gate electrode includes a protrusion extending along a boundary between the gate contact and the gate capping pattern.

公开(公告)号：US20220336664A1

公开(公告)日：2022-10-20

申请号：US17558967

申请日：2021-12-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Deok Han BAE ,  Ju Hun PARK ,  Myung Yoon UM ,  Yu Ri LEE ,  In Yeal LEE

IPC: H01L29/78 ,  H01L29/08

Abstract: A semiconductor device is capable of improving the performance and reliability of a device. The semiconductor device includes a first fin-shaped pattern which extends lengthwise in a first direction, a second fin-shaped pattern which is spaced apart from the first fin-shaped pattern in a second direction and extends lengthwise in the first direction, a first gate electrode extending lengthwise in the second direction on the first fin-shaped pattern, a second gate electrode extending lengthwise in the second direction on the second fin-shaped pattern, a first gate separation structure which separates the first gate electrode and the second gate electrode and is at the same vertical level as the first gate electrode and the second gate electrode, and a first source/drain contact extending lengthwise in the second direction on the first fin-shaped pattern and the second fin-shaped pattern. The first source/drain contact includes a first lower source/drain contact region which intersects the first fin-shaped pattern and the second fin-shaped pattern, and a first upper source/drain contact region which protrudes from the first lower source/drain contact region, and the first upper source/drain contact region does not overlap the first gate separation structure in the first direction.

公开(公告)号：US20220077292A1

公开(公告)日：2022-03-10

申请号：US17227848

申请日：2021-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Deok Han BAE ,  Sung Min KIM ,  Ju Hun PARK ,  Myung Yoon UM ,  Jong Mil YOUN

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/06 ,  H01L29/40

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising an element isolation region and an active region defined by the element isolation region, a fin-type pattern on the active region, the fin-type pattern extending in a first horizontal direction, a gate electrode on the fin-type pattern, the gate electrode extending in a second horizontal direction that crosses the first horizontal direction, a capping pattern on the gate electrode, a source/drain region on at least one side of the gate electrode, a source/drain contact on the source/drain region and electrically connected to the source/drain region, and a filling insulating layer on the source/drain contact, the filling insulating layer having a top surface at a same level as a top surface of the capping pattern, and including a material containing a carbon (C) atom.

公开(公告)号：US20240290855A1

公开(公告)日：2024-08-29

申请号：US18657993

申请日：2024-05-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Deok Han BAE ,  Ju Hun PARK ,  Myung Yoon UM

IPC: H01L29/417 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L29/41775 ,  H01L27/0924 ,  H01L29/0665 ,  H01L29/41733 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/7851 ,  H01L29/786

Abstract: A semiconductor device including a field insulating layer, a part of which protrudes upwardly in a vertical direction on an element isolation region between a first active region and a second active region may be provided. Accordingly, a depth of a source/drain contact to be provided may be reduced, thereby reducing difficulty for providing the source/drain contact may be reduced.

公开(公告)号：US20220320301A1

公开(公告)日：2022-10-06

申请号：US17539772

申请日：2021-12-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Deok Han BAE ,  Ju Hun PARK ,  Myung Yoon UM

IPC: H01L29/417 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423

Abstract: A semiconductor device including a field insulating layer, a part of which protrudes upwardly in a vertical direction on an element isolation region between a first active region and a second active region may be provided. Accordingly, a depth of a source/drain contact to be provided may be reduced, thereby reducing difficulty for providing the source/drain contact may be reduced.

公开(公告)号：US20170263722A1

公开(公告)日：2017-09-14

申请号：US15408815

申请日：2017-01-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Gun YOU ,  Gi Gwan PARK ,  Sug Hyun SUNG ,  Myung Yoon UM ,  Dong Suk SHIN

IPC: H01L29/417 ,  H01L27/088 ,  H01L29/78

CPC classification number: H01L29/41791 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/775 ,  H01L29/7848

Abstract: A semiconductor device includes a first gate electrode on a substrate, a first trench on a first side of the first gate electrode, a second trench on a second side of the first gate electrode, a depth of the second trench being greater than a depth of the first trench, a first source/drain filling the first trench, and a second source/drain filling the second trench, a height of an upper surface of the second source/drain being greater than a height of the first source/drain.

公开(公告)号：US20220254881A1

公开(公告)日：2022-08-11

申请号：US17516900

申请日：2021-11-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ju Hun PARK ,  Won Cheol JEONG ,  Jin Wook KIM ,  Deok Han BAE ,  Myung Yoon UM ,  In Yeal LEE ,  Yoon Young JUNG

IPC: H01L29/06 ,  H01L29/66

Abstract: A semiconductor device includes an active pattern extending in a first direction on a substrate, a gate structure on the active pattern and having a gate electrode extending in a second direction intersecting the active pattern, and a gate capping pattern on the gate electrode, the gate capping pattern including a gate capping liner defining a gate capping recess, the gate capping liner having a horizontal portion along an upper surface of the gate electrode, and a vertical portion extending from the horizontal portion in a third direction intersecting the first and second directions, and a gate capping filling film on the gate capping liner and filling the gate capping recess, an epitaxial pattern on the active pattern and adjacent the gate structure, a gate contact on and connected to the gate electrode, and an active contact on and connected to the epitaxial pattern.

公开(公告)号：US20200043807A1

公开(公告)日：2020-02-06

申请号：US16599313

申请日：2019-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan PARK ,  Jung Gun YOU ,  Ki Il KIM ,  Sug Hyun SUNG ,  Myung Yoon UM

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/78

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US20170221769A1

公开(公告)日：2017-08-03

申请号：US15292790

申请日：2016-10-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： GI GWAN PARK ,  Jung Gun YOU ,  Ki ll KIM ,  Sug Hyun SUNG ,  Myung Yoon UM

IPC: H01L21/8238 ,  H01L21/02 ,  H01L29/06 ,  H01L29/66 ,  H01L21/311 ,  H01L27/092 ,  H01L21/762 ,  H01L21/308

CPC classification number: H01L21/823821 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823481 ,  H01L21/823828 ,  H01L21/823878 ,  H01L27/0924 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/7848

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US20250133787A1

公开(公告)日：2025-04-24

申请号：US19005034

申请日：2024-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju Hun PARK ,  Won Cheol JEONG ,  Jin Wook KIM ,  Deok Han BAE ,  Myung Yoon UM ,  In Yeal LEE ,  Yoon Young JUNG

IPC: H10D62/10 ,  H10D64/01

Abstract: A semiconductor device includes an active pattern extending in a first direction on a substrate, a gate structure on the active pattern and having a gate electrode extending in a second direction intersecting the active pattern, and a gate capping pattern on the gate electrode, the gate capping pattern including a gate capping liner defining a gate capping recess, the gate capping liner having a horizontal portion along an upper surface of the gate electrode, and a vertical portion extending from the horizontal portion in a third direction intersecting the first and second directions, and a gate capping filling film on the gate capping liner and filling the gate capping recess, an epitaxial pattern on the active pattern and adjacent the gate structure, a gate contact on and connected to the gate electrode, and an active contact on and connected to the epitaxial pattern.