公开(公告)号：US20130176803A1

公开(公告)日：2013-07-11

申请号：US13661773

申请日：2012-10-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Ho Lee ,  Kyu-Chang Kang ,  Hyo-Chang Kim ,  Jae-Youn Youn ,  Sang-Jae Rhee

IPC: G11C11/402 ,  G11C7/12 ,  G11C7/06

CPC classification number: G11C7/08 ,  G11C11/40626 ,  G11C11/4091 ,  G11C2211/4065 ,  G11C2211/4068

Abstract: A semiconductor memory device and a self-refresh method of the semiconductor memory device. The semiconductor memory device includes: a memory cell array including one or more memory cells; a sense amplifier connected to a sensing line and a complementary sensing line and sensing/amplifying data stored in the one or more memory cells; and a sense amplifier control circuit sequentially supplying a first voltage and a second voltage having different levels to the sense amplifier through the sensing line during a refresh operation.

Abstract translation: 半导体存储器件和半导体存储器件的自刷新方法。 半导体存储器件包括：包括一个或多个存储单元的存储单元阵列; 连接到感测线和互补感测线的感测放大器，以及感测/放大存储在所述一个或多个存储器单元中的数据; 以及读出放大器控制电路，其在刷新操作期间通过感测线路顺序地将具有不同电平的第一电压和第二电压提供给读出放大器。

公开(公告)号：US09147461B1

公开(公告)日：2015-09-29

申请号：US14185264

申请日：2014-02-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Youn Youn ,  So-Young Kim ,  Kwang-Sook Noh ,  Sang-Jae Rhee ,  Hyun-Chul Yoon ,  Yoon-Jae Lee ,  Jung-Bae Lee ,  Joo-Sun Choi

IPC: G11C11/40 ,  G11C11/406 ,  G11C8/18 ,  G06F11/10 ,  G11C11/22

CPC classification number: G11C11/40626 ,  G06F11/106 ,  G11C7/1045 ,  G11C7/22 ,  G11C8/12 ,  G11C8/18 ,  G11C11/22 ,  G11C11/40618 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/409

Abstract: A semiconductor memory device includes a memory cell array and a refresh control circuit. The refresh circuit is configured to: perform a second burst refresh operation on the memory cell rows after the memory cell rows exit from a self refresh operation, and not perform the second burst refresh operation on the memory cell rows after the memory cell rows exit from a self refresh operation. Whether the refresh control circuit performs or does not perform the second burst refresh operation is based on a comparison between an entering time for the self refresh operation of the memory cell rows and a reference time.

Abstract translation: 半导体存储器件包括存储单元阵列和刷新控制电路。 刷新电路被配置为：在存储单元行从自刷新操作退出之后对存储单元行执行第二突发刷新操作，并且在存储单元行从退出之后不对存储单元行执行第二次突发刷新操作 自刷新操作。 刷新控制电路执行还是不执行第二脉冲串刷新操作是基于存储单元行的自刷新操作的输入时间与参考时间之间的比较。

公开(公告)号：US11112451B2

公开(公告)日：2021-09-07

申请号：US16296954

申请日：2019-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chul-Min Lee ,  Tae-Kyung Ko ,  Jin-Seong Kim ,  Hyeong-Gon Son ,  Seung-Woo Hong ,  Dong-Gu Lee ,  Sang-Jae Rhee

IPC: G01R31/28 ,  G01R31/317

Abstract: A test method for a semiconductor device includes: loading a test tray having semiconductor devices of first and second lots arranged thereon into a test chamber; storing lot information of each of the semiconductor devices; performing a test program on each of the semiconductor devices; obtaining ID information of each of the semiconductor devices; matching the ID information with the lot information to generate lot sorting information; and sorting the semiconductor devices based on results of the test program and the lot sorting information.