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公开(公告)号:US20200333701A1
公开(公告)日:2020-10-22
申请号:US16918106
申请日:2020-07-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Mun-Ja KIM , Ji-Beom YOO , Soo-Young KIM , Hee-Bom KIM , Hwan-Chul JEON , Seul-Gi KIM , Tae-Sung KIM , Dong-Wook SHIN
IPC: G03F1/64
Abstract: A method of manufacturing a pellicle includes preparing a pellicle frame having an adhesive layer coated thereon, treating a pellicle membrane with vapor under vapor atmosphere, attaching the pellicle membrane onto the pellicle frame, and drying the pellicle membrane.
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公开(公告)号:US20160201201A1
公开(公告)日:2016-07-14
申请号:US14969645
申请日:2015-12-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Mun-Ja KIM , Tae-Sung KIM , Ji-Beom YOO , Byung-Gook KIM , Soo-Young KIM , Dong-Wook SHIN , Jae-Hyuck CHOI
IPC: C23F1/14
CPC classification number: G03F1/62 , C01B32/182 , C01B32/194 , C01B32/20 , C23C16/01 , C23C16/26 , C23C16/56 , C23F1/00 , C23F1/02 , C23F1/14 , G03F1/64
Abstract: A method of manufacturing a pellicle includes forming a membrane on a first surface of a substrate from a chemical reaction in which the substrate serves as a catalyst, forming a protective pattern on a second surface of the substrate, immersing the substrate in an etchant solution, such that a portion of the substrate exposed through the protective pattern is removed to form a frame, and replacing the etchant solution with a solvent.
Abstract translation: 防护薄膜组件的制造方法包括:从基板作为催化剂的化学反应在基板的第一面上形成膜,在基板的第二面上形成保护图案,将基板浸渍在蚀刻液中, 使得通过保护图案曝光的基板的一部分被去除以形成框架,并用溶剂替换蚀刻剂溶液。
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公开(公告)号:US20180275508A1
公开(公告)日:2018-09-27
申请号:US15690879
申请日:2017-08-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Mun-Ja KIM , Ji-Beom YOO , Soo-Young KIM , Hee-Bom KIM , Hwan-Chul JEON , Seul-Gi KIM , Tae-Sung KIM , Dong-Wook SHIN
IPC: G03F1/64
CPC classification number: G03F1/64
Abstract: A method of manufacturing a pellicle includes preparing a pellicle frame having an adhesive layer coated thereon, treating a pellicle membrane with vapor under vapor atmosphere, attaching the pellicle membrane onto the pellicle frame, and drying the pellicle membrane.
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公开(公告)号:US20180174959A1
公开(公告)日:2018-06-21
申请号:US15677054
申请日:2017-08-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Young-Ju KIM , Su-A KIM , Soo-Young KIM , Min-Woo WON , Bok-Yeon WON , Ji-Suk KWON , Young-Ho KIM , Ji-Hak YU , Hyun-Chul YOON , Seok-Jae LEE , Sang-Keun HAN , Woong-Dai KANG , Hyuk-Joon KWON , Bum-Jae LEE
IPC: H01L23/522 , H01L23/50 , H01L23/552 , H01L23/528 , H01L23/00
CPC classification number: H01L23/5225 , G11C7/06 , G11C7/1057 , G11C11/4087 , G11C11/4091 , G11C11/4097 , H01L23/50 , H01L23/5226 , H01L23/5286 , H01L23/552 , H01L24/06 , H01L24/20 , H01L2224/02331 , H01L2224/02373 , H01L2224/02375 , H01L2224/02379 , H01L2224/02381 , H01L2224/04105 , H01L2224/06155 , H01L2224/06159 , H01L2224/12105 , H01L2924/18162 , H01L2924/3025
Abstract: A memory device including a memory cell array region, includes, column selection signal lines formed in a first column conduction layer of the memory cell array region and extending in a column direction, global input-output data lines formed in a second column conduction layer of the memory cell array region different from the first column conduction layer and extending in the column direction and power lines formed in a shield conduction layer of the memory cell array region between the first column conduction layer and the second column conduction layer. The noises in the signal lines and the power lines may be reduced and performance of the memory device may be enhanced by forming the column selection signal lines and the global input-output data lines in different column conduction layers and forming the power lines in the shield conduction layer between the column conduction layers.
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