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    STORAGE DEVICE AND RETRAINING METHOD THEREOF
    1.
    发明申请
    STORAGE DEVICE AND RETRAINING METHOD THEREOF 有权

    公开(公告)号：US20210349660A1

    公开(公告)日：2021-11-11

    申请号：US17030635

    申请日：2020-09-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： TONGSUNG KIM ,  JANGWOO LEE ,  SEONKYOO LEE ,  CHIWEON YOON ,  JEONGDON IHM

    IPC: G06F3/06 ,  G06K9/62

    Abstract: A storage device includes NVM package and a controller connected to the NVM package through a channel and controlling operation of the NVM package. The NVM package includes an interface chip, first NVM devices connected to the interface chip through a first internal channel and second NVM devices connected to the interface chip through a second internal channel. The interface chip selects the first internal channel in response to an operation request received from the controller and connects the first internal channel to the channel. The interface chip also determines whether retraining is necessary in relation to the second internal channel and transmits a retraining request to the controller when retraining is necessary.

    MEMORY DEVICE, MEMORY SYSTEM INCLUDING MEMORY DEVICE AND VEHICLE-BASED SYSTEM INCLUDING MEMORY SYSTEM
    2.
    发明申请
    MEMORY DEVICE, MEMORY SYSTEM INCLUDING MEMORY DEVICE AND VEHICLE-BASED SYSTEM INCLUDING MEMORY SYSTEM 有权

    公开(公告)号：US20210132816A1

    公开(公告)日：2021-05-06

    申请号：US17027978

    申请日：2020-09-22

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： YOUNGMIN JO ,  DAESEOK BYEON ,  TONGSUNG KIM

    IPC: G06F3/06 ,  G06F12/02 ,  G06N3/08

    Abstract: A memory device comprises a smart buffer, and a memory area divided into a first memory area and a second memory area, wherein the smart buffer comprises a priority setting unit configured to receive a sensing data and a corresponding weight from a controller, determine a priority of the sensing data based on the weight, and classify the sensing data as one of first priority sensing data and second priority sensing data, and a channel controller configured to allocate at least one channel selected from among a plurality of channels to a first channel group, allocate at least another channel selected from among the plurality of channels to a second channel group, assign the first channel group to process the first priority sensing data in relation to the first memory area, and assign the second channel group to process the second priority sensing data in relation to the second memory area, wherein a number of data input/output (I/O) pins connected to the first channel group is greater than a number of data I/O pins connected to the second channel group, wherein the memory area includes at least one memory chip, wherein the at least one memory chip includes a first chip having a first metal pad and a cell region and a second chip having a second metal pad and a peripheral circuit region, and the first chip and the second chip are vertically connected to each other by the first metal pad and the second metal pad.

    MEMORY DEVICE, MEMORY SYSTEM INCLUDING MEMORY DEVICE AND VEHICLE-BASED SYSTEM INCLUDING MEMORY SYSTEM
    4.
    发明申请
    MEMORY DEVICE, MEMORY SYSTEM INCLUDING MEMORY DEVICE AND VEHICLE-BASED SYSTEM INCLUDING MEMORY SYSTEM 有权

    公开(公告)号：US20210133128A1

    公开(公告)日：2021-05-06

    申请号：US16853807

    申请日：2020-04-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： YOUNGMIN JO ,  DAESEOK BYEON ,  TONGSUNG KIM

    IPC: G06F13/16 ,  G06N3/04 ,  H01L25/065 ,  H01L25/18

    Abstract: A memory device provides a first memory area and a second memory area. A smart buffer includes; a priority setting unit receiving sensing data and a corresponding weight, determining a priority of the sensing data based on the corresponding weight, and classifying the sensing data as first priority sensing data or second priority sensing data based on the priority, and a channel controller allocating a channel to a first channel group, allocating another channel to a second channel group, assigning the first channel group to process the first priority sensing data in relation to the first memory area, and assigning the second channel group to process the second priority sensing data in relation to the second memory area.

    MEMORY DEVICE SUPPORTING DBI INTERFACE AND OPERATING METHOD OF MEMORY DEVICE
    7.
    发明申请
    MEMORY DEVICE SUPPORTING DBI INTERFACE AND OPERATING METHOD OF MEMORY DEVICE 有权

    公开(公告)号：US20220101895A1

    公开(公告)日：2022-03-31

    申请号：US17477931

    申请日：2021-09-17

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： YOUNGMIN JO ,  Byunghoon Jeong ,  TONGSUNG KIM ,  CHIWEON YOON ,  SEONKYOO LEE

    IPC: G11C7/10

    Abstract: A memory device includes a memory cell array, a page buffer, a control logic circuit, a plurality of input/output pins, a data bus inversion (DBI) pin, and an interface circuit. The page buffer is connected to the memory cell array. The control logic circuit is configured to control an operation of the memory cell array. The plurality of input/output pins receive a plurality of data signals from the controller. The DBI pin receives a DBI signal from the controller. The interface circuit count a first number of bits having a logic value of 1 and a second number of bits having a logic value of 0 from the data signals and the DBI signal and provide the data signals to the page buffer or the control logic circuit based on the first number and the second number.

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