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    Semiconductor device manufacturing system
    3.
    发明授权
    Semiconductor device manufacturing system 有权

    公开(公告)号：US11635697B2

    公开(公告)日：2023-04-25

    申请号：US17234908

    申请日：2021-04-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Soon Hwan Cha ,  Chan Hwang ,  Woo Jin Jung

    IPC: G03F7/20

    Abstract: A semiconductor device manufacturing system includes a photolithography apparatus that performs exposure. On a semiconductor substrate including a chip area and a scribe lane area. An etching apparatus etches the exposed semiconductor substrate. An observing apparatus images the etched semiconductor substrate. A controller controls the photolithography apparatus and the etching apparatus. The controller generates a first mask pattern and provides the first mask pattern to the photolithography apparatus. The photolithography apparatus performs exposure on the semiconductor substrate using the first mask pattern. The etching apparatus performs etching on the exposed semiconductor substrate to provide an etched semiconductor substrate. The observing apparatus generates a first semiconductor substrate image by imaging the etched semiconductor substrate corresponding to the scribe lane area. The controller generates a second mask pattern based on the first mask pattern and the first semiconductor substrate image, and provides the second mask pattern to the photolithography apparatus.

    Methods of manufacturing semiconductor devices from multi-device semiconductor wafers
    4.
    发明授权
    Methods of manufacturing semiconductor devices from multi-device semiconductor wafers 有权

    公开(公告)号：US12033855B2

    公开(公告)日：2024-07-09

    申请号：US17322412

    申请日：2021-05-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jang Hoon Kim ,  Soo Kyung Kim ,  Tae-Kyu Kim ,  Young Kuk Byun ,  Woo Jin Jung

    IPC: H01L21/027 ,  H01L21/311

    CPC classification number: H01L21/0274 ,  H01L21/31144

    Abstract: A method of manufacturing a semiconductor device includes forming a mold layer on a semiconductor wafer having a plurality of integrated circuit die at least partially defined therein. An etch stopper film is selectively formed on a second portion of the mold layer extending adjacent a periphery of the semiconductor wafer, but not on a first portion of the mold layer extending opposite at least one of the plurality of integrated circuit die. A preliminary pattern layer is formed on the etch stopper film and on the first portion of the mold layer. A plurality of patterns are formed in the preliminary pattern layer by selectively exposing the preliminary pattern layer to extreme ultraviolet light (EUV). Then, hole patterns are selectively formed in the first portion of the mold layer, using the exposed preliminary pattern layer and the etch stopper film as an etching mask.

    IMAGE PROCESSING METHOD AND SYSTEM THEREOF
    5.
    发明公开
    IMAGE PROCESSING METHOD AND SYSTEM THEREOF 审中-公开

    公开(公告)号：US20240005476A1

    公开(公告)日：2024-01-04

    申请号：US18141690

    申请日：2023-05-01

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Min Su KANG ,  Jang Hoon Kim ,  Woo Jin Jung

    IPC: G06T7/00 ,  G06T7/13

    CPC classification number: G06T7/0006 ,  G06T7/13 ,  G06T2207/10061 ,  G06T2207/30148

    Abstract: An image processing system, including an input interface configured to receive a first direction image corresponding to a view of a semiconductor device in a first direction, and a second direction image corresponding to a view of the semiconductor device in a second direction which intersects the first direction at a first height at which the first direction image is generated; a processor configured to perform an edge detection operation for detecting an edge based on the first direction image, and to perform an image binarization operation on the first direction image; and a learning device configured to compare a first line width obtained based on the image binarization operation, and a second line width obtained based on the second direction image through machine learning, and to learn a condition of the image binarization operation which maximizes a correlation between the first line width and the second line width.

    MEMORY DEVICE
    7.
    发明申请
    MEMORY DEVICE 有权

    公开(公告)号：US20220350362A1

    公开(公告)日：2022-11-03

    申请号：US17678117

    申请日：2022-02-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Tae Min Choi ,  Chan Ho Lee ,  Jung Hak Song ,  Ju Chang Lee ,  Woo Jin Jung

    IPC: G06F1/06

    Abstract: A memory device is provided. The memory device comprises an internal clock generator configured to receive an external clock signal from a host and generate an internal clock signal in accordance with a chip enable signal, an internal enable signal generator configured to operate based on the internal clock signal and receive an external enable signal from the host and generate an internal enable signal, and a monitoring signal generator configured to output a monitoring signal that is generated based on at least one of the internal clock signal or the internal enable signal to the host.

    METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES FROM MULTI-DEVICE SEMICONDUCTOR WAFERS
    8.
    发明申请
    METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES FROM MULTI-DEVICE SEMICONDUCTOR WAFERS 有权

    公开(公告)号：US20220093393A1

    公开(公告)日：2022-03-24

    申请号：US17322412

    申请日：2021-05-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jang Hoon Kim ,  Soo Kyung Kim ,  Tae-Kyu Kim ,  Young Kuk Byun ,  Woo Jin Jung

    IPC: H01L21/027 ,  H01L21/311

    Abstract: A method of manufacturing a semiconductor device includes forming a mold layer on a semiconductor wafer having a plurality of integrated circuit die at least partially defined therein. An etch stopper film is selectively formed on a second portion of the mold layer extending adjacent a periphery of the semiconductor wafer, but not on a first portion of the mold layer extending opposite at least one of the plurality of integrated circuit die. A preliminary pattern layer is formed on the etch stopper film and on the first portion of the mold layer. A plurality of patterns are formed in the preliminary pattern layer by selectively exposing the preliminary pattern layer to extreme ultraviolet light (EUV). Then, hole patterns are selectively formed in the first portion of the mold layer, using the exposed preliminary pattern layer and the etch stopper film as an etching mask.

    Memory device with real-time monitoring
    9.
    发明授权
    Memory device with real-time monitoring 有权

    公开(公告)号：US11960319B2

    公开(公告)日：2024-04-16

    申请号：US17678117

    申请日：2022-02-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Tae Min Choi ,  Chan Ho Lee ,  Jung Hak Song ,  Ju Chang Lee ,  Woo Jin Jung

    IPC: G06F1/06 ,  G11C11/41

    CPC classification number: G06F1/06 ,  G11C11/41

    Abstract: A memory device is provided. The memory device comprises an internal clock generator configured to receive an external clock signal from a host and generate an internal clock signal in accordance with a chip enable signal, an internal enable signal generator configured to operate based on the internal clock signal and receive an external enable signal from the host and generate an internal enable signal, and a monitoring signal generator configured to output a monitoring signal that is generated based on at least one of the internal clock signal or the internal enable signal to the host.

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