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    FAST POLYNOMIAL DIVISION BY MONOMIAL FOR REED-SOLOMON ELP MAINTENANCE
    1.
    发明申请
    FAST POLYNOMIAL DIVISION BY MONOMIAL FOR REED-SOLOMON ELP MAINTENANCE 有权

    公开(公告)号：US20240380416A1

    公开(公告)日：2024-11-14

    申请号：US18196581

    申请日：2023-05-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Amit BERMAN ,  Dikla SHAPIRO ,  Yaron SHANY

    IPC: H03M13/15 ,  H03M13/00

    Abstract: Systems, devices, and methods for decoding information bits obtained from storage, including obtaining a codeword from among a plurality of codewords stored in a storage device, wherein the codeword includes a plurality of frames; obtaining an initial error locator polynomial (ELP) corresponding to the codeword; decoding a frame of the plurality of frames; based on determining that the frame is successfully decoded, determine an updated ELP based on the initial ELP and information about the frame; and obtaining information bits corresponding to the codeword based on the updated ELP, wherein the updated ELP includes a plurality of updated coefficients, and wherein the updated ELP is determined by simultaneously calculating at least two updated coefficients from among the plurality of updated coefficients.

    METHODS AND SYSTEMS FOR SOFT-DECISION DECODING
    3.
    发明申请
    METHODS AND SYSTEMS FOR SOFT-DECISION DECODING 有权
    软决策解码的方法和系统

    公开(公告)号：US20160301429A1

    公开(公告)日：2016-10-13

    申请号：US14683656

    申请日：2015-04-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yaron SHANY ,  Jun Jin KONG

    IPC: H03M13/45 ,  G11C29/52 ,  H03M13/15 ,  G06F11/10

    CPC classification number: H03M13/152 ,  H03M13/1515 ,  H03M13/1525 ,  H03M13/153 ,  H03M13/3707 ,  H03M13/451

    Abstract: At least one example embodiment discloses a method of soft-decision Wu decoding a code, the code being one of a generalized Reed-Solomon type and an alternant type. The method includes obtaining a module of the code, the module being a sub-module of at least a first extension module and a second extension module, the first extension module being defined by a set of first type constraints and the second extension module being defined by a set of second type constraints, the first type constraints being applicable to a first interpolation algorithm and a second interpolation algorithm and the second type constraints being applicable to the first interpolation algorithm, determining a basis for the first extension module and converting the basis for the first extension module to a basis for the module.

    Abstract translation: 至少一个示例性实施例公开了一种软判决吴解码码的方法，该代码是广义里德 - 所罗门类型和交替类型之一。 该方法包括获得代码的模块，模块是至少第一扩展模块和第二扩展模块的子模块，第一扩展模块由一组第一类型约束定义，第二扩展模块被定义 通过一组第二类型约束，第一类型约束适用于第一插值算法和第二插值算法，第二类型约束适用于第一插值算法，确定第一扩展模块的基础并将 第一个扩展模块为模块的基础。

    SOFT REED-SOLOMON DECODER FOR A NON-VOLATILE MEMORY
    4.
    发明公开
    SOFT REED-SOLOMON DECODER FOR A NON-VOLATILE MEMORY 审中-公开

    公开(公告)号：US20240137048A1

    公开(公告)日：2024-04-25

    申请号：US18045576

    申请日：2022-10-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Avner DOR ,  Yaron SHANY ,  Ariel DOUBCHAK ,  Amit BERMAN

    IPC: H03M13/15 ,  H03M13/11

    CPC classification number: H03M13/1575 ,  H03M13/1111 ,  H03M13/1545

    Abstract: A soft-decision decoding computes a first syndrome polynomial in accordance with a received word, computes a second syndrome polynomial by multiplying the first syndrome polynomial by a locator polynomial based on locations of erasures within the received word, finds a basis and private solution to an affine space of polynomials that solve key equations based on the second syndrome polynomial, determines a weak set of a locations of symbols in the received word with confidence below a certain confidence level, computes a matrix from the basis, the private solution and the weak set, determines sub-matrices in the matrix whose rank is equal to a rank of the matrix, determines error locator polynomial (ELP) candidates from the sub-matrices, the basis, and the private solution, and corrects the received word using a selected one of the ELP candidates.

    LOW-POWER SYSTEMATIC ECC ENCODER WITH BALANCING BITS
    6.
    发明申请
    LOW-POWER SYSTEMATIC ECC ENCODER WITH BALANCING BITS 有权

    公开(公告)号：US20240372568A1

    公开(公告)日：2024-11-07

    申请号：US18142703

    申请日：2023-05-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Idan DEKEL ,  Amit BERMAN ,  Ariel DOUBCHAK ,  Yaron SHANY

    IPC: H03M13/39 ,  H03M13/15 ,  H03M13/19

    Abstract: Systems, devices, and methods for encoding information bits for storage, including obtaining information bits and a target constraints vector, placing the information bits in an input vector, setting balance bits included in the input vector to zero, encoding the input vector using a systematic code to obtain a preliminary codeword, applying a constraints matrix to the preliminary codeword to obtain a preliminary constraints vector, applying a transition matrix to a sum of the preliminary constraints vector and the target constraints vector to determine updated balance bits, obtaining an output codeword based on the information bits and the updated balance bits, and storing the output codeword in the storage device.

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