公开(公告)号：US20140231010A1

公开(公告)日：2014-08-21

申请号：US14183994

申请日：2014-02-19

申请人： Sang-Jine PARK ,  Bo-Un YOON ,  Jeong-Nam HAN ,  Kee-Sang KWON ,  Doo-Sung YUN ,  Won-Sang CHOI

发明人： Sang-Jine PARK ,  Bo-Un YOON ,  Jeong-Nam HAN ,  Kee-Sang KWON ,  Doo-Sung YUN ,  Won-Sang CHOI

IPC分类号： H01L21/67

CPC分类号： H01L21/67075 ,  H01L21/67017 ,  H01L21/6708

摘要： A chemical supplier includes a chemical reservoir containing a chemical mixture at a room temperature, an inner space of the chemical reservoir being separated from surroundings, a supply line through which the chemical mixture is supplied to a process chamber from the chemical reservoir, an inline heater positioned on the supply line and heating the chemical mixture in the supply line to a process temperature, and a power source driving the chemical mixture to move the chemical mixture toward the process chamber.

摘要翻译： 化学品供应商包括在室温下含有化学混合物的化学容器，化学容器的内部空间与周围环境分离，供应管线，化学混合物通过该供应管线从化学容器供应到处理室，一体式加热器 定位在供应管线上并将供应管线中的化学混合物加热至处理温度，以及驱动化学混合物以将化学混合物移向处理室的电源。

公开(公告)号：US20130023100A1

公开(公告)日：2013-01-24

申请号：US13479679

申请日：2012-05-24

申请人： Sang-Jine PARK ,  Doo-Sung YUN ,  Bo-Un YOON ,  Jeong-Nam HAN ,  Kee-Sang KWON ,  Won-Sang CHOI

发明人： Sang-Jine PARK ,  Doo-Sung YUN ,  Bo-Un YOON ,  Jeong-Nam HAN ,  Kee-Sang KWON ,  Won-Sang CHOI

IPC分类号： H01L21/336

CPC分类号： H01L21/823425 ,  H01L21/02063 ,  H01L21/28518 ,  H01L21/31116 ,  H01L21/76814 ,  H01L21/76897 ,  H01L21/823475 ,  H01L29/78

摘要： A method of fabricating a semiconductor device, the method including forming on a substrate a transistor that includes a gate electrode and a source and drain region, forming an interlayer insulating film on the transistor, forming a contact hole in the interlayer insulating film to expose a top surface of the source and drain region, and a thin film is formed at an interface between the contact hole and the exposed top surface of the source and drain region. The method further including selectively removing at least a portion of the thin film by performing an etching process in a non-plasma atmosphere, forming an ohmic contact film on the source and drain region where at least a portion of the thin film was selectively removed, and forming a contact plug by filling the contact hole with a conductive material.

摘要翻译： 一种制造半导体器件的方法，所述方法包括在衬底上形成包括栅极和源极和漏极区的晶体管，在所述晶体管上形成层间绝缘膜，在所述层间绝缘膜中形成接触孔以暴露出 源极和漏极区域的顶表面，并且在接触孔和源极和漏极区域的暴露顶表面之间的界面处形成薄膜。 该方法还包括通过在非等离子体气氛中进行蚀刻工艺来选择性地去除薄膜的至少一部分，在选择性地去除薄膜的至少一部分的源区和漏区上形成欧姆接触膜， 以及通过用导电材料填充接触孔来形成接触塞。

公开(公告)号：US20160133512A1

公开(公告)日：2016-05-12

申请号：US14747316

申请日：2015-06-23

申请人： Woojin LEE ,  VietHa NGUYEN ,  Wookyung YOU ,  Doo-Sung YUN ,  Hyunbae LEE ,  Byunghee KIM ,  Sang Hoon AHN ,  Seungyong YOO ,  Naein LEE ,  Hoyun JEON

发明人： Woojin LEE ,  VietHa NGUYEN ,  Wookyung YOU ,  Doo-Sung YUN ,  Hyunbae LEE ,  Byunghee KIM ,  Sang Hoon AHN ,  Seungyong YOO ,  Naein LEE ,  Hoyun JEON

IPC分类号： H01L21/768 ,  H01L21/311 ,  H01L21/321 ,  H01L21/31

CPC分类号： H01L21/76832 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/32134 ,  H01L21/76807 ,  H01L21/76834

摘要： A method of manufacturing the semiconductor device includes providing a first interlayer dielectric layer having a conductive pattern, sequentially forming a first etch stop layer, a second etch stop layer, a second interlayer dielectric layer and a mask pattern on the first interlayer dielectric layer, forming an opening in the second interlayer dielectric layer using the mask pattern as a mask, the opening exposing the second etch stop layer, and performing an etching process including simultaneously removing the mask pattern and the second etch stop layer exposed by the opening to expose the first etch stop layer.

摘要翻译： 制造半导体器件的方法包括提供具有导电图案的第一层间电介质层，在第一层间介质层上依次形成第一蚀刻停止层，第二蚀刻停止层，第二层间电介质层和掩模图案，形成 使用掩模图案作为掩模的第二层间电介质层中的开口，暴露第二蚀刻停止层的开口，以及执行蚀刻处理，包括同时去除由开口暴露的掩模图案和第二蚀刻停止层，以暴露第一蚀刻停止层 蚀刻停止层。