PATTERN LAYOUT CREATION METHOD, PROGRAM PRODUCT, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
    1.
    发明申请
    PATTERN LAYOUT CREATION METHOD, PROGRAM PRODUCT, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD 有权
    图案布局创建方法,程序产品和半导体器件制造方法

    公开(公告)号:US20100191357A1

    公开(公告)日:2010-07-29

    申请号:US12630048

    申请日:2009-12-03

    CPC classification number: G06F17/5068 G06F2217/12 Y02P90/265

    Abstract: A graph in which patterns are each regarded as nodes and nodes of patterns adjacent to each other at a first distance are connected with each other by an edge is produced, each of the patterns is classified into two types so that the two patterns corresponding to the nodes at both ends of the edge are types different to each other, a classification result is corrected by grouping the patterns in each node cluster connected by the edge or each node cluster connected via the node by the edge, and by inverting each of types of a pattern belonging to a same group as that of one pattern, out of a pair of patterns that are classified into a same type and that belong to respectively different groups adjacent to each other at a second distance, and a pattern layout diagram is created based on the corrected classification result.

    Abstract translation: 每个图形被认为是在第一距离处彼此相邻的图案的节点和节点之间的图形被生成,每个图案被分成两种类型,使得对应于 边缘两端的节点是彼此不同的类型,分类结果通过将由边缘连接的每个节点簇中的模式或通过该节点连接的每个节点集合的边缘分组,并将每种类型的 在一对图案中属于与一种图案相同的组合的图案,其分为相同类型并且分别属于彼此相邻的第二距离的不同组,并且基于图案布局图 对正确的分类结果。

    MASK PATTERN FORMATION METHOD, MASK PATTERN FORMATION APPARATUS, AND LITHOGRAPHY MASK
    2.
    发明申请
    MASK PATTERN FORMATION METHOD, MASK PATTERN FORMATION APPARATUS, AND LITHOGRAPHY MASK 审中-公开
    掩模图案形成方法,掩模图案形成装置和平铺掩模

    公开(公告)号:US20090031262A1

    公开(公告)日:2009-01-29

    申请号:US12179735

    申请日:2008-07-25

    CPC classification number: G06F17/5068

    Abstract: A mask pattern formation method and apparatus capable of performing OPC and lithography verification and obtaining OPC result, and a lithography mask are provided. The method of forming a mask pattern from a design layout of a semiconductor integrated circuit comprises inputting a design layout, performing first OPC on the design layout, calculating a first evaluation value for a finished planar shape of a resist pattern corresponding to the design layout based on the first OPC, determining whether the first evaluation value satisfies a predetermined value, if the first evaluation value does not satisfy the predetermined value, locally altering the design layout, performing second OPC on the altered design layout, calculating a second evaluation value for the altered design layout, performing second determination, and if the second evaluation value satisfies the predetermined value, outputting the result of OPC and the first and second evaluation values.

    Abstract translation: 提供了能够执行OPC和光刻验证并获得OPC结果的掩模图案形成方法和装置,以及光刻掩模。 从半导体集成电路的设计布局形成掩模图案的方法包括输入设计布局,在设计布局上执行第一OPC,计算与设计布局相对应的抗蚀剂图案的成品平面形状的第一评估值 在第一OPC上,确定第一评估值是否满足预定值,如果第一评估值不满足预定值,则局部改变设计布局,在改变的设计布局上执行第二OPC,计算第二评估值 改变设计布局,执行第二确定,以及如果第二评估值满足预定值,则输出OPC的结果以及第一和第二评估值。

    Design pattern correcting method, design pattern forming method, process proximity effect correcting method, semiconductor device and design pattern correcting program
    3.
    发明申请
    Design pattern correcting method, design pattern forming method, process proximity effect correcting method, semiconductor device and design pattern correcting program 审中-公开
    设计模式校正方法,设计模式形成方法,过程接近效应校正方法,半导体器件和设计模式校正程序

    公开(公告)号:US20050251781A1

    公开(公告)日:2005-11-10

    申请号:US11115322

    申请日:2005-04-27

    CPC classification number: G03F1/36

    Abstract: A design pattern correcting method of correcting a design pattern in relation to a minute step of the design pattern, is disclosed, which comprises extracting at least one of two edges extended from a vertex of the design pattern, measuring a length of the extracted edge, determining whether or not the length of the measured edge is shorter than a predetermined value, extracting two vertexes connected to the extracted edge if it is determined that the length of the extracted edge is shorter than the predetermined value, and reshaping the design pattern to match positions of the two extracted vertexes with each other.

    Abstract translation: 公开了一种相对于设计图案的微小步骤校正设计图案的设计图案校正方法,其包括提取从设计图案的顶点延伸的两个边缘中的至少一个,测量提取的边缘的长度, 确定测量的边缘的长度是否短于预定值,如果确定提取的边缘的长度短于预定值,则提取连接到所提取的边缘的两个顶点,并且重新设计匹配的设计模式 两个提取的顶点的位置彼此相对。

    Database creation method, database device and design data evaluation method
    4.
    发明授权
    Database creation method, database device and design data evaluation method 有权
    数据库创建方法,数据库设备和设计数据评估方法

    公开(公告)号:US08195697B2

    公开(公告)日:2012-06-05

    申请号:US12354594

    申请日:2009-01-15

    CPC classification number: G06F17/5045

    Abstract: A database creation method relating to semiconductor ICs, the database registering function block cells constituting a design data of semiconductor IC and evaluation values corresponding to the function block cells such that the function block cells are associated with the evaluation values, for each of the semiconductor ICs, the creation method includes judging whether or not that function block cells constituting a design data of desired semiconductor IC include an unregistered function block cell which is not registered in the database, calculating an unregistered evaluation value corresponding to the unregistered function block cell when the function block cells constituting the design data of the desired semiconductor IC are judged to include the unregistered function block cell, and updating the database by registering the unregistered function block cell and the unregistered evaluation value such that the unregistered function block cell is associated with the unregistered evaluation value.

    Abstract translation: 关于半导体IC的数据库创建方法,构成半导体IC的设计数据的数据库登记功能块单元和与功能块单元相对应的评估值,使得功能块单元与评估值相关联,用于每个半导体IC 所述创建方法包括判断构成所需半导体IC的设计数据的功能块单元是否包括未登记在数据库中的未注册功能块单元,计算与未注册功能块单元相对应的未注册评估值, 判断构成期望的半导体IC的设计数据的块单元包括未注册的功能块单元,并且通过注册未注册的功能块单元和未注册的评估值来更新数据库,使得未注册的功能块单元与未注册的评估相关联 价值。

    Method for verifying and correcting post-OPC pattern layout
    5.
    发明授权
    Method for verifying and correcting post-OPC pattern layout 失效
    OPC模式布局校验和校正方法

    公开(公告)号:US07752595B2

    公开(公告)日:2010-07-06

    申请号:US11892764

    申请日:2007-08-27

    CPC classification number: G03F1/36 G03F1/70

    Abstract: A pattern producing method includes specifying a first pattern and a second pattern obtained by modifying the first pattern, specifying a correction area based on the second pattern, in a part of an area including the first pattern and the second pattern, producing at least a part of the first pattern, which is included in the correction area, as a correction target pattern, producing a part of the first or second pattern, which is not included in the correction area, as a correction reference pattern, correcting the correction target pattern on the basis of the correction target pattern and the correction reference pattern, and producing a pattern based on the corrected correction target pattern and the second pattern.

    Abstract translation: 图案生成方法包括:在包括第一图案和第二图案的区域的一部分中指定通过修改第一图案而获得的第一图案和第二图案,该第一图案和第二图案指定基于第二图案的校正区域, 包括在校正区域中的第一图案作为校正目标图案,产生不包括在校正区域中的第一或第二图案的一部分作为校正参考图案,校正校正目标图案 校正目标图案和校正参考图案的基础,并且基于校正的校正目标图案和第二图案产生图案。

    PATTERN DATA GENERATION METHOD AND PATTERN DATA GENERATION PROGRAM
    6.
    发明申请
    PATTERN DATA GENERATION METHOD AND PATTERN DATA GENERATION PROGRAM 有权
    模式数据生成方法和模式数据生成程序

    公开(公告)号:US20090037852A1

    公开(公告)日:2009-02-05

    申请号:US12180244

    申请日:2008-07-25

    CPC classification number: G06F17/5081

    Abstract: A pattern data generation method of an aspect of the present invention, the method includes creating at least one modification guide to modify a modification target point contained in pattern data, evaluating the modification guides on the basis of an evaluation item, the evaluation item being a change in the shape of the pattern data for the modification target point caused by the modification based on the modification guides or a change in electric characteristics of a pattern formed in accordance with the pattern data, selecting a predetermined modification guide from among the modification guides on the basis of the evaluation result of the modification guides, and modifying the modification target point in accordance with the selected modification guide.

    Abstract translation: 本发明的一个方式的图形数据生成方法,该方法包括创建至少一个修改指南,以修改包含在图案数据中的修改目标点,基于评估项目评估修改指南,评估项目是 基于修改引导引起的修改目标点的图案数据的形状的改变或根据图案数据形成的图案的电特性的变化,从修改引导件中选择预定的修改指南 修改指南的评估结果的基础,以及根据所选择的修改指南修改修改目标点。

    Pattern data creating method, pattern data creating program, and semiconductor device manufacturing method
    7.
    发明授权
    Pattern data creating method, pattern data creating program, and semiconductor device manufacturing method 有权
    图案数据创建方法,图案数据创建程序和半导体器件制造方法

    公开(公告)号:US08234596B2

    公开(公告)日:2012-07-31

    申请号:US12552010

    申请日:2009-09-01

    CPC classification number: G03F1/36

    Abstract: A pattern data creating method according to an embodiment of the present invention comprises: extracting marginal error patterns using a first result obtained by applying process simulation to mask pattern data based on an evaluation target cell pattern, applying the process simulation to mask pattern data based on an evaluation target cell pattern with peripheral environment pattern created by arranging a peripheral environment pattern in the marginal error patterns such that a second result obtained by creating mask pattern data and applying the process simulation to the mask pattern data is more deteriorated than the first result, and correcting the evaluation target cell pattern or the mask pattern data based on the evaluation target cell pattern when there is a fatal error.

    Abstract translation: 根据本发明的实施例的图形数据创建方法包括:使用通过应用过程模拟获得的第一结果来提取边缘误差模式以基于评估目标单元图案来屏蔽图案数据,将过程模拟应用于基于 通过将周边环境图案布置在边缘误差图案中,使得通过创建掩模图案数据获得的第二结果和对掩模图案数据应用处理模拟而得到的第一结果比第一结果更差,从而产生具有周边环境图案的评估对象单元图案, 以及当存在致命错误时,基于评估对象单元图案来校正评估对象单元格图案或掩模图案数据。

    Pattern layout designing method, semiconductor device manufacturing method, and computer program product
    8.
    发明授权
    Pattern layout designing method, semiconductor device manufacturing method, and computer program product 有权
    图案布局设计方法,半导体器件制造方法和计算机程序产品

    公开(公告)号:US08151225B2

    公开(公告)日:2012-04-03

    申请号:US12630643

    申请日:2009-12-03

    Applicant: Shimon Maeda

    Inventor: Shimon Maeda

    CPC classification number: G06F17/5068 G03F1/00 G03F1/26 G03F1/70

    Abstract: A graph is created in which mask patterns adjacent to one another at a distance in which desired printing resolution cannot be obtained in a lithography process among mask patterns generated based on a pattern layout design drawing are set as nodes connected to one another by edges. An odd number loop formed by an odd number of nodes is selected from closed loops. When the selected odd number loop is not isolated, based on whether a closed loop group in which a plurality of closed loops including the odd number loop are connected includes an even number loop formed by an even number of nodes, rearrangement target nodes are selected from the odd number loop included in the closed loop group according to different selection references. The layout of patterns described in the pattern layout design drawing is rearranged corresponding to the selected rearrangement target nodes.

    Abstract translation: 创建图形,其中以基于图案布局设计图形生成的掩模图案之间的光刻处理中在距离不相等的距离处彼此相邻的掩模图案被设置为通过边缘彼此连接的节点。 从闭环中选择由奇数个节点形成的奇数循环。 当所选择的奇数循环不被隔离时,基于其中包括奇数循环的多个闭环的闭环组是否包括由偶数个节点形成的偶数循环,重排目标节点从 根据不同的选择参考,包括在闭环组中的奇数循环。 在图案布局设计图中描述的图案的布局对应于所选择的重排目标节点重新排列。

    PATTERN DATA CREATING METHOD, PATTERN DATA CREATING PROGRAM, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
    9.
    发明申请
    PATTERN DATA CREATING METHOD, PATTERN DATA CREATING PROGRAM, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD 有权
    图形数据创建方法,图形数据创建程序和半导体器件制造方法

    公开(公告)号:US20100081294A1

    公开(公告)日:2010-04-01

    申请号:US12552010

    申请日:2009-09-01

    CPC classification number: G03F1/36

    Abstract: A pattern data creating method according to an embodiment of the present invention comprises: extracting marginal error patterns using a first result obtained by applying process simulation to mask pattern data based on an evaluation target cell pattern, applying the process simulation to mask pattern data based on an evaluation target cell pattern with peripheral environment pattern created by arranging a peripheral environment pattern in the marginal error patterns such that a second result obtained by creating mask pattern data and applying the process simulation to the mask pattern data is more deteriorated than the first result, and correcting the evaluation target cell pattern or the mask pattern data based on the evaluation target cell pattern when there is a fatal error.

    Abstract translation: 根据本发明的实施例的图形数据创建方法包括:使用通过应用过程模拟获得的第一结果来提取边缘误差模式以基于评估目标单元图案来屏蔽图案数据,将过程模拟应用于基于 通过将周边环境图案布置在边缘误差图案中,使得通过创建掩模图案数据获得的第二结果和对掩模图案数据应用处理模拟而得到的第一结果比第一结果更差,从而产生具有周边环境图案的评估对象单元图案, 以及当存在致命错误时,基于评估对象单元图案来校正评估对象单元格图案或掩模图案数据。

    Pattern producing method, semiconductor device manufacturing method and program
    10.
    发明申请
    Pattern producing method, semiconductor device manufacturing method and program 失效
    图案生产方法,半导体器件制造方法和程序

    公开(公告)号:US20090053619A1

    公开(公告)日:2009-02-26

    申请号:US11892764

    申请日:2007-08-27

    CPC classification number: G03F1/36 G03F1/70

    Abstract: A pattern producing method includes specifying a first pattern and a second pattern obtained by modifying the first pattern, specifying a correction area based on the second pattern, in a part of an area including the first pattern and the second pattern, producing at least a part of the first pattern, which is included in the correction area, as a correction target pattern, producing a part of the first or second pattern, which is not included in the correction area, as a correction reference pattern, correcting the correction target pattern on the basis of the correction target pattern and the correction reference pattern, and producing a pattern based on the corrected correction target pattern and the second pattern.

    Abstract translation: 图案生成方法包括:在包括第一图案和第二图案的区域的一部分中,指定通过修改第一图案而获得的第一图案和第二图案,该第一图案和第二图案指定基于第二图案的校正区域, 包括在校正区域中的第一图案作为校正目标图案,产生不包括在校正区域中的第一或第二图案的一部分作为校正参考图案,校正校正目标图案 校正目标图案和校正参考图案的基础,并且基于校正的校正目标图案和第二图案产生图案。

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