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公开(公告)号:US20240321798A1
公开(公告)日:2024-09-26
申请号:US18602396
申请日:2024-03-12
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor: Chi-Ren Chen , Po-Yung Chang , Pei-Geng Weng , Yuan-Hung Hsu , Chang-Fu Lin , Don-Son Jiang
IPC: H01L23/00 , H01L21/56 , H01L23/31 , H01L23/498
CPC classification number: H01L24/14 , H01L21/56 , H01L23/31 , H01L23/49816 , H01L23/49838 , H01L23/562
Abstract: An electronic package is provided and includes a carrier for carrying electronic components. Electrical contact pads of the carrier for planting solder balls are connected with a plurality of columnar conductors, and the conductors are electrically connected to a circuit portion in the carrier. By connecting a plurality of conductors with a single electrical contact pad, structural stress can be distributed and breakage of the circuit portion can be prevented.
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公开(公告)号:US20230268262A1
公开(公告)日:2023-08-24
申请号:US17750931
申请日:2022-05-23
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor: Li-Chu Chang , Yuan-Hung Hsu , Don-Son Jiang
IPC: H01L23/498 , H01L25/065 , H01L21/48 , H01L23/48
CPC classification number: H01L23/49833 , H01L25/0655 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L23/481 , H01L24/16
Abstract: A method of manufacturing an electronic package is provided and includes disposing a circuit member and a plurality of electronic elements on opposite sides of a carrier structure having circuit layers respectively, so that any two of the plurality of electronic elements can be electrically connected to each other via the circuit layers and the circuit member, where a vertical projected area of the carrier structure is larger than a vertical projected area of the circuit member, such that the circuit member is free from being protruded from side surfaces of the carrier structure. Therefore, the circuit member replaces a part of circuit layers of the carrier structure to reduce the difficulty of fabricating the circuit layers in the carrier structure.
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公开(公告)号:US20210320076A1
公开(公告)日:2021-10-14
申请号:US16922169
申请日:2020-07-07
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor: Yu-Lung Huang , Chee-Key Chung , Chang-Fu Lin , Yuan-Hung Hsu
IPC: H01L23/00
Abstract: Provided is an electronic package, including a first substrate of a first conductive structure and a second substrate of a second conductive structure, where a first conductive layer, a bump body and a metal auxiliary layer of the first conductive structure are sequentially formed on the first substrate, and a metal pillar, a second conductive layer, a metal layer and a solder layer of the second conductive structure are sequentially formed on the second substrate, such that the solder layer is combined with the bump body and the metal auxiliary layer to stack the first substrate and the second substrate. Therefore, the arrangement of the bump body and the metal auxiliary layer allows complete reaction of the IMCs after reflowing the solder layer, and the volume of the conductive structures will not continue to shrink. As such, the problem of cracking of the conductive structures can be effectively averted.
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公开(公告)号:US11102890B2
公开(公告)日:2021-08-24
申请号:US16201239
申请日:2018-11-27
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor: Ying-Chang Tseng , Yuan-Hung Hsu , Chang-Fu Lin
Abstract: This present disclosure provides an electronic package and a method for manufacturing the same. An antenna board with a limiter is stacked on a circuit board. A support body for holding the antenna board and the circuit board in place is provided between the antenna board and the circuit board, such that in the process of forming the support body, the limiter stops the flow of an adhesive material of the support body, and the adhesive material of the support body is prevented from overflowing onto an antenna structure of the antenna board to make sure that the antenna of the antenna board functions properly.
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公开(公告)号:US20210082837A1
公开(公告)日:2021-03-18
申请号:US16867937
申请日:2020-05-06
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor: Yu-Lung Huang , Chee-Key Chung , Yuan-Hung Hsu , Chi-Jen Chen
IPC: H01L23/00 , H01L23/538 , H01L21/768
Abstract: An electronic package is provided and includes a plurality of electronic elements, a spacing structure connecting each of the plurality of electronic elements, and a plurality of conductive elements electrically connected to the plurality of electronic elements and serving as external contacts. The spacing structure has a recess to enhance the flexibility of the electronic elements after the electronic elements are connected to one another, thereby preventing the problem of warpage. A method for fabricating the electronic package is also provided.
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公开(公告)号:US20210068260A1
公开(公告)日:2021-03-04
申请号:US17086888
申请日:2020-11-02
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor: Yu-Lung Huang , Chee-Key Chung , Chang-Fu Lin , Yuan-Hung Hsu
Abstract: A carrier structure is provided. A spacer is formed in an insulation board body provided with a circuit layer, and is not electrically connected to the circuit layer. The spacer breaks the insulation board body, and a structural stress of the insulation board body will not be continuously concentrated on a hard material of the insulation board body, thereby preventing warpage from occurring to the insulation board body.
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公开(公告)号:US12107055B2
公开(公告)日:2024-10-01
申请号:US18109120
申请日:2023-02-13
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor: Chih-Hsun Hsu , Chi-Jen Chen , Hsi-Chang Hsu , Yuan-Hung Hsu , Rui-Feng Tai , Don-Son Jiang
CPC classification number: H01L23/562 , H01L21/4853 , H01L21/56 , H01L23/3157 , H01L24/05 , H01L25/0655 , H01L25/50 , H01L24/16 , H01L2224/05556 , H01L2224/16227
Abstract: An electronic package is provided and includes at least one protective structure positioned between a first electronic element and a second electronic element on a carrier for reducing stresses generated inside the first electronic element and the second electronic element when a filling material is formed on the carrier, encapsulates the protective structure and comes into contact with the first electronic element and the second electronic element, thereby preventing cracking of the first electronic element and the second electronic element and improving the reliability of the electronic package.
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公开(公告)号:US12100642B2
公开(公告)日:2024-09-24
申请号:US17854241
申请日:2022-06-30
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor: Yu-Lung Huang , Chee-Key Chung , Chang-Fu Lin , Yuan-Hung Hsu
IPC: H01L21/48 , H01L23/00 , H01L23/433
CPC classification number: H01L23/433 , H01L21/4871 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2224/29194 , H01L2224/32245
Abstract: An electronic package is provided and includes an electronic element, an intermediary structure disposed on the electronic element, and a heat dissipation element bonded to the electronic element through the intermediary structure. The intermediary structure has a flow guide portion and a permanent fluid combined with the flow guide portion so as to be in contact with the electronic element, thereby achieving a preferred heat dissipation effect and preventing excessive warping of the electronic element or the heat dissipation element due to stress concentration.
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公开(公告)号:US11532528B2
公开(公告)日:2022-12-20
申请号:US17160720
申请日:2021-01-28
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Inventor: Chi-Jen Chen , Hsi-Chang Hsu , Yuan-Hung Hsu , Chang-Fu Lin , Don-Son Jiang
Abstract: An electronic package and a method for manufacturing the electronic package are provided. The method includes forming a slope surface on at least one side surface of at least one of a plurality of electronic components, and then disposing the plurality of electronic components on a carrier structure, such that the two adjacent electronic components form a space by the slope surface. Afterwards, an encapsulation layer is formed on the carrier structure and filled into the space to cover the two adjacent electronic components so as to disperse stress on the electronic components through the design of the space to prevent cracking due to stress concentration.
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公开(公告)号:US11516925B2
公开(公告)日:2022-11-29
申请号:US16856259
申请日:2020-04-23
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor: Han-Hung Chen , Yuan-Hung Hsu , Chang-Fu Lin , Rung-Jeng Lin , Fu-Tang Huang
IPC: H05K3/46 , H01L21/02 , H05K3/34 , H01L21/56 , H01L23/498 , H01L25/065 , H01L21/683 , H01L25/10 , H01L25/00 , H05K1/18 , H05K3/00 , H01L23/31 , H01L23/538
Abstract: The present disclosure provides a package stack structure and a method for manufacturing the same. The method is characterized by stacking coreless circuit portions on the board of an electronic component to reduce the overall thickness of the package stack structure.
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