摘要:
A washing machine and a method of controlling a washing machine are provided. A drum may be rotated from a stopped state to a specific angle less than 180 degrees. While the drum is rotated, a laundry amount may be sensed based on a current value of a motor that rotates the drum. The laundry amount may be sensed simply and accurately.
摘要:
A data output timing control circuit for a semiconductor apparatus includes a phase adjustment unit. The phase adjustment unit is configured to shift a phase of a read command as large as a code value of the delay control code in sequential synchronization with a plurality of delayed clocks obtained by delaying the external clock as large as predetermined delay amounts, respectively, delay the shifted read command as large as the variable delay amount, and output the result of delay as an output enable flag signal.
摘要:
The present disclosure relates to a terminal, method, system and computer-readable storage medium for adjusting attributes of a user input area based on past user selections, which facilitate a present user selection by changing or adjusting attributes of a user-input area based on the number of past user selections. The terminal includes a user reaction information acquisition unit which acquires reaction information based on at least one past user selection of an input area provided to a user, a reaction information update unit which updates the reaction information on the provided input area, an input area exposure attributes adjustment unit which adjusts attributes of the input area based on the updated reaction information, and an input area provision unit which allows an input area based on the adjusted attributes to be displayed on a display unit in response to a user's request to provide an input area.
摘要:
A synchronization circuit includes a delay line, and a first loop and a second loop configured to share the delay line, and the second loop is activated when a number of unit delay cells used in the delay line is equal to or less than a predetermined number according to an operation of the first loop.
摘要:
Disclosed herein is a search word link advertisement system including: an advertisement executing unit determining a search word link advertisement based on search words input during a matching period and exposing the determined search word link advertisement to provide the advertisement; a log recording unit storing a history of the determined search word link advertisement; and a matching period adjusting unit determining a transmission amount of search word link advertisement at any point in time or periodically in a state in which the search word link advertisement is provided and optimizing and adjusting the matching period according to the determined transmission amount.
摘要:
A latency control circuit includes: a delay locked loop (DLL) configured to generate a DLL clock signal by delaying a clock signal by a delay time varied according to any one of dual locking points, and generate a loop change signal according to a locking point change; a control unit configured to generate a latency control signal in response to a reset signal, a delay signal generated by delaying the reset signal by a first delay time, and the loop change signal; and a latency signal generation unit configured to adjust a latency of a command signal in response to the latency control signal and output a latency signal.
摘要:
Provided are a system and method for providing a wireless network service to a user terminal free of charge, by providing a doorway page for exposing an advertisement on the user terminal provided with the wireless network service through an access point. Accordingly, the user terminal may be provided with the wireless network service free of charge, other than the cost of viewing the advertisement exposed on the doorway page. An advertiser and a proprietor may expose the advertisement at the cost of providing the free wireless network service.
摘要:
A semiconductor memory apparatus includes a first data selection section inputted with the first data and second data and output one of the first data and the second data as first selection data in response to an address signal, a second data selection section inputted with the second data and the first selection data and output one of the second data and the first selection data as second selection data depending upon an input and output mode, and a data output section configured to be inputted with the first and second selection data and output first and second output data.
摘要:
A memory module is configured to include a first rank installed with a first memory chip and a second rank installed with a second memory chip. When the first and second memory chips are in a first data output mode, the first memory chip is configured to externally output lower order data of a plurality of data via lower data output pins. Also, when the first and second memory chips are in the first data output mode, the second memory chip is configured to externally output data that has the same order as the lower order data output by the first memory chip via upper data output pins.
摘要:
A semiconductor memory apparatus includes a first data selection section inputted with the first data and second data and output one of the first data and the second data as first selection data in response to an address signal, a second data selection section inputted with the second data and the first selection data and output one of the second data and the first selection data as second selection data depending upon an input and output mode, and a data output section configured to be inputted with the first and second selection data and output first and second output data.