SYNCHRONIZATION CIRCUIT
    2.
    发明申请
    SYNCHRONIZATION CIRCUIT 有权
    同步电路

    公开(公告)号:US20120177158A1

    公开(公告)日:2012-07-12

    申请号:US13190079

    申请日:2011-07-25

    申请人: Kyung Hoon KIM

    发明人: Kyung Hoon KIM

    IPC分类号: H04L7/00

    摘要: A synchronization circuit includes a delay line, and a first loop and a second loop configured to share the delay line, and the second loop is activated when a number of unit delay cells used in the delay line is equal to or less than a predetermined number according to an operation of the first loop.

    摘要翻译: 同步电路包括延迟线以及被配置为共享延迟线的第一回路和第二回路,并且当延迟线中使用的单元延迟单元的数量等于或小于预定数量时,第二回路被激活 根据第一循环的操作。

    DATA OUTPUT TIMING CONTROL CIRCUIT FOR SEMICONDUCTOR APPARATUS

    公开(公告)号:US20130214833A1

    公开(公告)日:2013-08-22

    申请号:US13601661

    申请日:2012-08-31

    申请人: Kyung Hoon KIM

    发明人: Kyung Hoon KIM

    IPC分类号: H03L7/08

    摘要: A data output timing control circuit for a semiconductor apparatus includes a phase adjustment unit. The phase adjustment unit is configured to shift a phase of a read command as large as a code value of the delay control code in sequential synchronization with a plurality of delayed clocks obtained by delaying the external clock as large as predetermined delay amounts, respectively, delay the shifted read command as large as the variable delay amount, and output the result of delay as an output enable flag signal.

    TERMINAL, METHOD, SYSTEM, AND COMPUTER-READABLE STORAGE MEDIUM FOR ADJUSTING ATTRIBUTES OF USER-INPUT AREA BASED ON USER SELECTION
    4.
    发明申请
    TERMINAL, METHOD, SYSTEM, AND COMPUTER-READABLE STORAGE MEDIUM FOR ADJUSTING ATTRIBUTES OF USER-INPUT AREA BASED ON USER SELECTION 审中-公开
    基于用户选择调整用户输入区域的终端,方法,系统和计算机可读存储介质

    公开(公告)号:US20120079402A1

    公开(公告)日:2012-03-29

    申请号:US13244207

    申请日:2011-09-23

    申请人: Kyung Hoon KIM

    发明人: Kyung Hoon KIM

    IPC分类号: G06F3/048

    CPC分类号: G06F3/04842 G06F3/0481

    摘要: The present disclosure relates to a terminal, method, system and computer-readable storage medium for adjusting attributes of a user input area based on past user selections, which facilitate a present user selection by changing or adjusting attributes of a user-input area based on the number of past user selections. The terminal includes a user reaction information acquisition unit which acquires reaction information based on at least one past user selection of an input area provided to a user, a reaction information update unit which updates the reaction information on the provided input area, an input area exposure attributes adjustment unit which adjusts attributes of the input area based on the updated reaction information, and an input area provision unit which allows an input area based on the adjusted attributes to be displayed on a display unit in response to a user's request to provide an input area.

    摘要翻译: 本公开涉及一种用于基于过去的用户选择来调整用户输入区域的属性的终端,方法,系统和计算机可读存储介质,其通过基于以下操作来改变或调整用户输入区域的属性来促进当前用户选择: 过去用户选择的数量。 终端包括用户反应信息获取单元,其基于提供给用户的输入区域的至少一个过去的用户选择来获取反应信息;响应信息更新单元,其更新所提供的输入区域上的反应信息;输入区域曝光 属性调整单元,其基于更新的反应信息调整输入区域的属性;以及输入区域提供单元,其响应于用户提供输入的请求,允许基于所调整的属性的输入区域显示在显示单元上 区。

    SEMICONDUCTOR MEMORY APPARATUS
    5.
    发明申请
    SEMICONDUCTOR MEMORY APPARATUS 失效
    半导体存储器

    公开(公告)号:US20100091598A1

    公开(公告)日:2010-04-15

    申请号:US12345835

    申请日:2008-12-30

    IPC分类号: G11C8/06 G11C7/10

    摘要: A semiconductor memory apparatus includes a first data selection section inputted with the first data and second data and output one of the first data and the second data as first selection data in response to an address signal, a second data selection section inputted with the second data and the first selection data and output one of the second data and the first selection data as second selection data depending upon an input and output mode, and a data output section configured to be inputted with the first and second selection data and output first and second output data.

    摘要翻译: 半导体存储装置包括:第一数据选择部,输入第一数据和第二数据,并响应于地址信号输出第一数据和第二数据之一作为第一选择数据;第二数据选择部,输入第二数据 和第一选择数据,并且根据输入和输出模式将第二数据和第一选择数据中的一个作为第二选择数据输出,以及数据输出部分,被配置为输入第一和第二选择数据并输出第一和第二 输出数据。

    SEARCH WORD LINK ADVERTISEMENT SYSTEM, METHOD FOR OPTIMIZING MATCHING PERIOD THEROF AND COMPUTER READABLE RECORDING MEDIUM THEREOF
    7.
    发明申请
    SEARCH WORD LINK ADVERTISEMENT SYSTEM, METHOD FOR OPTIMIZING MATCHING PERIOD THEROF AND COMPUTER READABLE RECORDING MEDIUM THEREOF 审中-公开
    搜索词链接广告系统,优化匹配期限的方法和计算机可读记录介质

    公开(公告)号:US20120330752A1

    公开(公告)日:2012-12-27

    申请号:US13530749

    申请日:2012-06-22

    申请人: Kyung Hoon KIM

    发明人: Kyung Hoon KIM

    IPC分类号: G06Q30/02

    CPC分类号: G06Q30/02

    摘要: Disclosed herein is a search word link advertisement system including: an advertisement executing unit determining a search word link advertisement based on search words input during a matching period and exposing the determined search word link advertisement to provide the advertisement; a log recording unit storing a history of the determined search word link advertisement; and a matching period adjusting unit determining a transmission amount of search word link advertisement at any point in time or periodically in a state in which the search word link advertisement is provided and optimizing and adjusting the matching period according to the determined transmission amount.

    摘要翻译: 这里公开了一种搜索词链接广告系统,包括:广告执行单元,基于在匹配时段期间输入的搜索词来确定搜索词链接广告,并且公开所确定的搜索词链接广告以提供广告; 存储确定的搜索词链接广告的历史的日志记录单元; 以及匹配周期调整单元,在提供搜索词链接广告的状态下,在任何时间点或周期性地确定搜索词链接广告的传输量,并根据确定的传输量来优化并调整匹配周期。

    LATENCY CONTROL CIRCUIT AND METHOD OF CONTROLLING LATENCY
    8.
    发明申请
    LATENCY CONTROL CIRCUIT AND METHOD OF CONTROLLING LATENCY 有权
    延迟控制电路及控制方法

    公开(公告)号:US20120194240A1

    公开(公告)日:2012-08-02

    申请号:US13219620

    申请日:2011-08-27

    IPC分类号: H03L7/06

    摘要: A latency control circuit includes: a delay locked loop (DLL) configured to generate a DLL clock signal by delaying a clock signal by a delay time varied according to any one of dual locking points, and generate a loop change signal according to a locking point change; a control unit configured to generate a latency control signal in response to a reset signal, a delay signal generated by delaying the reset signal by a first delay time, and the loop change signal; and a latency signal generation unit configured to adjust a latency of a command signal in response to the latency control signal and output a latency signal.

    摘要翻译: 延迟控制电路包括:延迟锁定环(DLL),被配置为通过根据双锁定点中的任一个延迟时钟信号延迟时钟信号来产生DLL时钟信号,并且根据锁定点生成环路变化信号 更改; 控制单元,被配置为响应于复位信号产生等待时间控制信号,通过将复位信号延迟第一延迟时间而产生的延迟信号和环路变化信号; 以及延迟信号生成单元,被配置为响应于等待时间控制信号来调整命令信号的等待时间并输出等待时间信号。

    SYSTEM AND METHOD FOR PROVIDING ADVERTISEMENT TO WIRELESS NETWORK SERVICE USER
    9.
    发明申请
    SYSTEM AND METHOD FOR PROVIDING ADVERTISEMENT TO WIRELESS NETWORK SERVICE USER 有权
    用于向无线网络服务用户提供广告的系统和方法

    公开(公告)号:US20110302033A1

    公开(公告)日:2011-12-08

    申请号:US13152030

    申请日:2011-06-02

    IPC分类号: G06Q30/00

    摘要: Provided are a system and method for providing a wireless network service to a user terminal free of charge, by providing a doorway page for exposing an advertisement on the user terminal provided with the wireless network service through an access point. Accordingly, the user terminal may be provided with the wireless network service free of charge, other than the cost of viewing the advertisement exposed on the doorway page. An advertiser and a proprietor may expose the advertisement at the cost of providing the free wireless network service.

    摘要翻译: 提供了一种通过提供通过接入点提供无线网络服务的用户终端上的广告曝光的门口页面来向用户终端免费提供无线网络服务的系统和方法。 因此,用户终端可以免费提供无线网络服务,而不是观看在门口页面上暴露的广告的费用。 广告商和所有者可以以提供免费无线网络服务为代价来公开该广告。

    SEMICONDUCTOR MEMORY APPARATUS
    10.
    发明申请
    SEMICONDUCTOR MEMORY APPARATUS 有权
    半导体存储器

    公开(公告)号:US20110242922A1

    公开(公告)日:2011-10-06

    申请号:US13158778

    申请日:2011-06-13

    IPC分类号: G11C7/10 G11C7/00

    摘要: A semiconductor memory apparatus includes a first data selection section inputted with the first data and second data and output one of the first data and the second data as first selection data in response to an address signal, a second data selection section inputted with the second data and the first selection data and output one of the second data and the first selection data as second selection data depending upon an input and output mode, and a data output section configured to be inputted with the first and second selection data and output first and second output data.

    摘要翻译: 半导体存储装置包括:第一数据选择部,输入第一数据和第二数据,并响应于地址信号输出第一数据和第二数据之一作为第一选择数据;第二数据选择部,输入第二数据 和第一选择数据,并且根据输入和输出模式将第二数据和第一选择数据中的一个作为第二选择数据输出,以及数据输出部分,被配置为输入第一和第二选择数据并输出第一和第二 输出数据。