公开(公告)号：US20230062897A1

公开(公告)日：2023-03-02

申请号：US18046924

申请日：2022-10-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： HAI-DANG TRINH ,  FA-SHEN JIANG ,  HSING-LIEN LIN ,  CHII-MING WU

IPC: H01L45/00

Abstract: A semiconductor device includes a diffusion barrier structure, a bottom electrode, a top electrode, a switching layer and a capping layer. The bottom electrode is over the diffusion barrier structure. The top electrode is over the bottom electrode. The switching layer is between the bottom electrode and the top electrode, and configured to store data. The capping layer is between the switching layer and the top electrode. The diffusion barrier structure includes a multiple-layer structure. A thermal conductivity of the diffusion barrier structure is greater than approximately 20 W/mK.

公开(公告)号：US20150069046A1

公开(公告)日：2015-03-12

申请号：US14539844

申请日：2014-11-12

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： CHUN HSIUNG TSAI ,  CHII-MING WU ,  DE-WEI YU ,  CHIEN-TAI CHAN

IPC: H01L21/67 ,  G01J5/00 ,  H05B3/00

CPC classification number: H01L21/67248 ,  G01J5/00 ,  G01J2005/0077 ,  G01J2005/0085 ,  H01L21/67115 ,  H01L27/14649 ,  H05B3/0047

Abstract: A thermal processing apparatus is provided in accordance with some embodiments. The thermal processing apparatus includes a heating source for transmitting incident radiation to a work piece having a circuit pattern formed on a front surface; a radiation sensor configured to receive light radiated from the front surface of the work piece; and a controller coupled to the radiation sensor, the controller being designed to control the heating source to reduce temperature variation of the work piece.

Abstract translation: 根据一些实施例提供热处理装置。 热处理装置包括用于将入射辐射传送到具有形成在前表面上的电路图案的工件的加热源; 辐射传感器，被配置为接收从所述工件的前表面辐射的光; 以及耦合到所述辐射传感器的控制器，所述控制器被设计成控制所述加热源以减小所述工件的温度变化。

公开(公告)号：US20250081864A1

公开(公告)日：2025-03-06

申请号：US18950227

申请日：2024-11-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： HAI-DANG TRINH ,  FA-SHEN JIANG ,  HSING-LIEN LIN ,  CHII-MING WU

IPC: H10N70/00

Abstract: A semiconductor device includes a diffusion barrier structure, a bottom electrode, a top electrode, a switching layer and a capping layer. The bottom electrode is over the diffusion barrier structure. The top electrode is over the bottom electrode. The switching layer is between the bottom electrode and the top electrode, and configured to store data. The capping layer is between the switching layer and the top electrode. The diffusion barrier structure includes a multiple-layer structure. A thermal conductivity of the diffusion barrier structure is greater than approximately 20 W/mK.

公开(公告)号：US20210202809A1

公开(公告)日：2021-07-01

申请号：US16732222

申请日：2019-12-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： CHIA-HUA LIN ,  YAO-WEN CHANG ,  CHII-MING WU ,  CHENG-YUAN TSAI ,  EUGENE I-CHUN CHEN ,  TZU-CHUNG TSAI

IPC: H01L33/60 ,  H01L27/15 ,  H01L33/62

Abstract: A semiconductor structure is provided. The semiconductor structure includes metallization structure, a plurality of conductive pads, and a dielectric layer. The plurality of conductive pads is over the metallization structure. The dielectric layer is on the metallization structure and covers the conductive pad. The dielectric layer includes a first dielectric film, a second dielectric film, and a third dielectric film. The first dielectric film is on the conductive pad. The second dielectric film is on the first dielectric film. The third dielectric film is on the second dielectric film. The a refractive index of the first dielectric film is smaller than a refractive index of the second dielectric film, and the refractive index of the second dielectric film is smaller than a refractive index of the third dielectric film.

公开(公告)号：US20210135102A1

公开(公告)日：2021-05-06

申请号：US16844875

申请日：2020-04-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： HSING-LIEN LIN ,  FU-TING SUNG ,  CHING JU YANG ,  CHII-MING WU

IPC: H01L45/00 ,  G11C13/00 ,  H01L27/24

Abstract: A semiconductor memory structure includes a memory cell, an encapsulation layer over a sidewall of the memory cell, and a nucleation layer between the sidewall of the memory cell and the encapsulation layer. The memory cell includes a top electrode, a bottom electrode and a data-storage element sandwiched between the bottom electrode and the top electrode. The nucleation layer includes metal oxide.

公开(公告)号：US20230255125A1

公开(公告)日：2023-08-10

申请号：US18302007

申请日：2023-04-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： HSING-LIEN LIN ,  FU-TING SUNG ,  CHING JU YANG ,  CHII-MING WU

IPC: H10N70/00 ,  G11C13/00 ,  H10B63/00 ,  H10N70/20

CPC classification number: H10N70/841 ,  G11C13/0007 ,  H10B63/30 ,  H10N70/253 ,  H10N70/826 ,  H10N70/883

Abstract: A method for forming a semiconductor memory structure include forming a pillar structure. The pillar structure includes a first conductive layer, a second conductive layer and a data storage material layer between the first and second conducive layers. A sidewall of the first conductive layer, a sidewall of the data storage layer and a sidewall of the second conductive layer are exposed. An oxygen-containing plasma treatment is performed on the pillar structure to form hydrophilic surfaces of the sidewall of the first conductive layer, the sidewall of the data storage layer and the sidewall of the second conductive layer. An encapsulation layer is formed over the pillar structure and the dielectric layer. The encapsulation layer is in contact with the hydrophilic surfaces of the sidewall of the first conductive layer, the sidewall of the data storage layer and the sidewall of the second conductive layer.

公开(公告)号：US20220173290A1

公开(公告)日：2022-06-02

申请号：US17675365

申请日：2022-02-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： CHIA-HUA LIN ,  YAO-WEN CHANG ,  CHII-MING WU ,  CHENG-YUAN TSAI ,  EUGENE I-CHUN CHEN ,  TZU-CHUNG TSAI

IPC: H01L33/60 ,  H01L33/62 ,  H01L27/15

Abstract: A method for manufacturing reflective structure is provided. The method includes the operations as follows. A metallization structure is received. A plurality of conductive pads are formed over the metallization structure. A plurality of dielectric stacks are formed over the conductive pads, respectively, wherein the thicknesses of the dielectric stacks are different. The dielectric stacks are isolated by forming a plurality of trenches over a plurality of intervals between each two adjacent dielectric stacks.

公开(公告)号：US20200052203A1

公开(公告)日：2020-02-13

申请号：US16657797

申请日：2019-10-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： HAI-DANG TRINH ,  FA-SHEN JIANG ,  HSING-LIEN LIN ,  CHII-MING WU

IPC: H01L45/00

Abstract: A semiconductor device includes a diffusion barrier structure, a bottom electrode, a top electrode over the bottom electrode, a switching layer and a capping layer. The bottom electrode is over the diffusion barrier structure. The top electrode is over the bottom electrode. The switching layer is between the bottom electrode and the top electrode, and configured to store data. The capping layer is between the top electrode and the switching layer. A thermal conductivity of the diffusion barrier structure is greater than approximately 20 W/mK.