公开(公告)号：US20160301418A1

公开(公告)日：2016-10-13

申请号：US15188481

申请日：2016-06-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ajay Kumar ,  Krishnaswamy Nagaraj ,  Joonsung Park

IPC: H03L7/107 ,  H03L7/18 ,  H03L7/087

CPC classification number: H03L7/107 ,  H03L7/06 ,  H03L7/087 ,  H03L7/0896 ,  H03L7/0898 ,  H03L7/093 ,  H03L7/1072 ,  H03L7/1075 ,  H03L7/18 ,  H03L2207/04

Abstract: A phase-locked loop (PLL) includes a state machine programmed to automatically produce a set of control signals to select a charge-pump current and integrating capacitance value to automatically adjust a loop bandwidth of the PLL. A charge-pump DAC generates a charge-pump current of magnitude controlled by the state machine control signals. An integrator integrates the charge-pump output current to produce an integrated charge-pump output signal. The integrator has a plurality of capacitors switchably selected by control signals from the state machine to produce an integrating capacitance value. A voltage controlled oscillator (VCO) produces a PLL output frequency in response to the integrated charge-pump output signal.

Abstract translation: 锁相环（PLL）包括被编程为自动产生一组控制信号以选择电荷泵电流并且积分电容值以自动调整PLL的环路带宽的状态机。 电荷泵DAC产生由状态机控制信号控制的电荷泵电流。 积分器集成了电荷泵输出电流，以产生集成的电荷泵输出信号。 积分器具有通过来自状态机的控制信号可切换地选择的多个电容器，以产生积分电容值。 压控振荡器（VCO）响应于集成的电荷泵输出信号产生PLL输出频率。

公开(公告)号：US09065476B2

公开(公告)日：2015-06-23

申请号：US13887918

申请日：2013-05-06

Applicant: Texas Instruments Incorporated

Inventor： Rahmi Hezar ,  Baher Haroun ,  Halil Kiper ,  Mounir Fares ,  Ajay Kumar

IPC: H03M1/66 ,  H03M1/74 ,  H03M3/00

CPC classification number: H03M1/66 ,  H03M1/747 ,  H03M3/464

Abstract: A system for processing a signal includes a detector configured to detect a two-level stream of bits; a converter configured to generate a three-level control signal based on two adjacent values within the two-level stream of bits; and a switch configured to determine which of three different paths to couple a current source to based on a value of the three-level control signal. Thus, based on adjacent values of the output stream a three-level control signal is generated which controls coupling of the current source to one of three different paths. This type of three-level digital-to-analog converter can be, for example, part of the feedback loop of an analog-to-digital converter. Similar techniques can also be utilized in a multi-segment digital-to-analog converter in which each segment of the DAC is controlled by a 3-level control signal and the DAC is implement using PMOS devices. The current source for each DAC segment is diverted to ground, the M-node, or the P-node depending on the value of the 3-level control signal.

Abstract translation: 一种用于处理信号的系统包括：检测器，被配置为检测两级比特流; 转换器，被配置为基于所述两级比特流内的两个相邻值生成三电平控制信号; 以及开关，被配置为基于三电平控制信号的值来确定三个不同路径中的哪一个耦合电流源。 因此，基于输出流的相邻值，生成三电平控制信号，其控制电流源与三个不同路径之一的耦合。 这种类型的三电平数模转换器可以是例如模数转换器的反馈回路的一部分。 类似的技术也可以用在多段数模转换器中，其中DAC的每个段由3电平控制信号控制，并且使用PMOS器件实现DAC。 每个DAC段的电流源根据3电平控制信号的值转移到地，M节点或P节点。

公开(公告)号：US20150002130A1

公开(公告)日：2015-01-01

申请号：US13929772

申请日：2013-06-27

Applicant: Texas Instruments Incorporated

Inventor： Ajay Kumar ,  Rahul Bhandarkar

IPC: G05F3/08

CPC classification number: G05F3/30 ,  G05F3/08

Abstract: A simple bandgap current generator combines a PTAT (proportional to absolute temperature) base-emitter voltage (VBE) measured across two binary junction devices (ΔVBE=VBE1-VBE2) with a current that is varied by an nWell resistor with a positive temperature coefficient to produce a CTAT (complementary to absolute temperature) current instead of PTAT reference current. One of the base-emitter voltages is constrained to be VBE1=VBE(1-βT). This reduces the temperature dependency of a reference current generated by the bandgap generator. This reference current may be used to generate a bandgap reference voltage by adding an IR drop to a diode voltage or to a base-emitter voltage. The simple bandgap circuit is significantly smaller in size than a precision bandgap circuit, but still provides a voltage and/or a current reference signal having a good accuracy.

Abstract translation: 简单的带隙电流发生器将跨两个二元连接器件（＆Dgr; VBE = VBE1-VBE2）测量的PTAT（与绝对温度成正比）的基极 - 发射极电压（VBE）与正电温度nwell电阻变化的电流相结合 系数产生CTAT（互补绝对温度）电流而不是PTAT参考电流。 一个基极 - 发射极电压被限制为VBE1 = VBE（1-＆bgr; T）。 这降低了由带隙发生器产生的参考电流的温度依赖性。 该参考电流可以用于通过将二极管电压或基极 - 发射极电压加上IR压降来产生带隙基准电压。 简单的带隙电路的尺寸明显小于精密带隙电路，但仍然提供具有良好精度的电压和/或电流参考信号。

公开(公告)号：US09197238B1

公开(公告)日：2015-11-24

申请号：US14478513

申请日：2014-09-05

Applicant: Texas Instruments Incorporated

Inventor： Krishnaswamy Nagaraj ,  Joonsung Park ,  Ajay Kumar

IPC: H03M1/10 ,  H03M1/38 ,  H03M1/12 ,  H03L7/08

CPC classification number: H03L7/0991 ,  H03L7/08 ,  H03L7/083 ,  H03L7/085 ,  H03M1/0624 ,  H03M1/1009 ,  H03M1/1255 ,  H03M1/38

Abstract: An analog-to-digital conversion system and method includes, for example, a comparator for sampling an analogy quantity during a sampling period and for performing a series of bit-wise conversions on the sampled analog sample during a conversion period, where each bit-wise conversion occurs during a respective bit-wise conversion cycle in which successive bits of a sample are successively determined during a respective bit conversion cycle and in which a predetermined number of bit-wise conversions are to be performed. A clock generator is arranged for generating a clock signal for clocking the converter during the conversion period, wherein each bit conversion cycle includes a reset period having a first length and an amplification period having a second length, wherein one of the first and second lengths is dynamically selected.

Abstract translation: 模数转换系统和方法包括例如比较器，用于在采样周期期间对类比数量进行采样，并且在转换周期期间对采样的模拟采样执行一系列逐位转换，其中每个位 - 在相应的逐位转换周期期间发生明智转换，其中在相应的位转换周期期间连续地确定采样的连续位，并且将执行预定数量的逐位转换。 时钟发生器被布置用于在转换周期期间产生用于对转换器进行时钟的时钟信号，其中每个位转换周期包括具有第一长度的复位周期和具有第二长度的放大周期，其中第一和第二长度中的一个是 动态选择。

公开(公告)号：US09612607B2

公开(公告)日：2017-04-04

申请号：US13929772

申请日：2013-06-27

Applicant: Texas Instruments Incorporated

Inventor： Ajay Kumar ,  Rahul Bhandarkar

IPC: G05F3/08 ,  G05F3/30

CPC classification number: G05F3/30 ,  G05F3/08

Abstract: A simple bandgap current generator combines a PTAT (proportional to absolute temperature) base-emitter voltage (VBE) measured across two binary junction devices (ΔVBE=VBE1−VBE2) with a current that is varied by an nWell resistor with a positive temperature coefficient to produce a CTAT (complementary to absolute temperature) current instead of PTAT reference current. One of the base-emitter voltages is constrained to be VBE1=VBE(1βT). This reduces the temperature dependency of a reference current generated by the bandgap generator. This reference current may be used to generate a bandgap reference voltage by adding an IR drop to a diode voltage or to a base-emitter voltage. The simple bandgap circuit is significantly smaller in size than a precision bandgap circuit, but still provides a voltage and/or a current reference signal having a good accuracy.

公开(公告)号：US20130241758A1

公开(公告)日：2013-09-19

申请号：US13887918

申请日：2013-05-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rahmi Hezar ,  Baher Haroun ,  Halil Kiper ,  Mounir Fares ,  Ajay Kumar

IPC: H03M1/66

CPC classification number: H03M1/66 ,  H03M1/747 ,  H03M3/464

Abstract: A system for processing a signal includes a detector configured to detect a two-level stream of bits; a converter configured to generate a three-level control signal based on two adjacent values within the two-level stream of bits; and a switch configured to determine which of three different paths to couple a current source to based on a value of the three-level control signal. Thus, based on adjacent values of the output stream a three-level control signal is generated which controls coupling of the current source to one of three different paths. This type of three-level digital-to-analog converter can be, for example, part of the feedback loop of an analog-to-digital converter. Similar techniques can also be utilized in a multi-segment digital-to-analog converter in which each segment of the DAC is controlled by a 3-level control signal and the DAC is implement using PMOS devices. The current source for each DAC segment is diverted to ground, the M-node, or the P-node depending on the value of the 3-level control signal.

Abstract translation: 一种用于处理信号的系统包括：检测器，被配置为检测两级比特流; 转换器，被配置为基于所述两级比特流内的两个相邻值生成三电平控制信号; 以及开关，被配置为基于三电平控制信号的值来确定三个不同路径中的哪一个耦合电流源。 因此，基于输出流的相邻值，生成三电平控制信号，其控制电流源与三个不同路径之一的耦合。 这种类型的三电平数模转换器可以是例如模数转换器的反馈回路的一部分。 类似的技术也可以用在多段数模转换器中，其中DAC的每个段由3电平控制信号控制，并且使用PMOS器件实现DAC。 每个DAC段的电流源根据3电平控制信号的值转移到地，M节点或P节点。