ENTERING PROTECTED PIPELINE MODE WITH CLEARING

    公开(公告)号:US20210326136A1

    公开(公告)日:2021-10-21

    申请号:US17360646

    申请日:2021-06-28

    Abstract: Techniques related to executing a plurality of instructions by a processor comprising receiving a first instruction for execution on an instruction execution pipeline, wherein the instruction execution pipeline is in a first execution mode, beginning execution of the first instruction on the instruction execution pipeline, receiving an execution mode instruction to switch the instruction execution pipeline to a second execution mode, switching the instruction execution pipeline to the second execution mode based on the received execution mode instruction, annulling the first instruction based on the execution mode instruction, receiving a second instruction for execution on the instruction execution pipeline, the second instruction, and executing the second instruction.

    NESTED LOOP CONTROL
    2.
    发明申请
    NESTED LOOP CONTROL 审中-公开

    公开(公告)号:US20200371762A1

    公开(公告)日:2020-11-26

    申请号:US16983429

    申请日:2020-08-03

    Abstract: A method for compiling and executing a nested loop includes initializing a nested loop controller with an outer loop count value and an inner loop count value. The nested loop controller includes a predicate FIFO. The method also includes coalescing the nested loop and, during execution of the coalesced nested loop, causing the nested loop controller to populate the predicate FIFO and executing a get predicate instruction having an offset value, where the get predicate returns a value from the predicate FIFO specified by the offset value. The method further includes predicating an outer loop instruction on the returned value from the predicate FIFO.

    NESTED LOOP CONTROL
    3.
    发明公开
    NESTED LOOP CONTROL 审中-公开

    公开(公告)号:US20240281231A1

    公开(公告)日:2024-08-22

    申请号:US18648583

    申请日:2024-04-29

    CPC classification number: G06F8/433 G06F5/06 G06F9/30065

    Abstract: A method for compiling and executing a nested loop includes initializing a nested loop controller with an outer loop count value and an inner loop count value. The nested loop controller includes a predicate FIFO. The method also includes coalescing the nested loop and, during execution of the coalesced nested loop, causing the nested loop controller to populate the predicate FIFO and executing a get predicate instruction having an offset value, where the get predicate returns a value from the predicate FIFO specified by the offset value. The method further includes predicating an outer loop instruction on the returned value from the predicate FIFO.

    NESTED LOOP CONTROL
    4.
    发明申请
    NESTED LOOP CONTROL 审中-公开

    公开(公告)号:US20200371800A1

    公开(公告)日:2020-11-26

    申请号:US16422823

    申请日:2019-05-24

    Abstract: A nested loop controller includes a first register having a first value initialized to an initial first value, a second register having a second value initialized to an initial second value, and a third register configured as a predicate FIFO, initialized to have a third value. The second value is advanced in response to a tick instruction during execution of a loop. In response to the second value reaching a second threshold, the second register is reset to the initial second value. The nested loop controller further includes a comparator coupled to the second register and to the predicate FIFO and configured to provide an outer loop indicator value as input to the predicate FIFO when the second value is equal to the second threshold, and provide an inner loop indicator value as input to the predicate FIFO when the second value is not equal to the second threshold.

Patent Agency Ranking