公开(公告)号：US20160132448A1

公开(公告)日：2016-05-12

申请号：US14935082

申请日：2015-11-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing MAUNG ,  Suzanne Mary VINING ,  Nirav Jayanti PATEL

IPC: G06F13/366 ,  G06F13/42 ,  G06F13/40

CPC classification number: G06F13/366 ,  G06F13/4027 ,  G06F13/4068 ,  G06F13/4282

Abstract: An apparatus includes a multiport hub, a single bridge configured to communicatively couple together a plurality of hosts and to emulate a slave device to each such host, and a plurality of connection port. The apparatus further includes a configurable data path network coupled to the multiport hub, the single bridge, and the plurality of connection ports. The configurable data path network is configured to selectively provide for a connection port for which a host is detected, data communications through the single bridge between the multiport hub and the connection port, and for a connection port for which no host is detected, data communications between the multiport hub and the connection port that bypass the single bridge. Corresponding methods are also so disclosed.

Abstract translation: 一种装置包括多端口集线器，被配置为将多个主机通信地耦合在一起并将从属设备模拟到每个这样的主机的单桥，以及多个连接端口。 该装置还包括耦合到多端口集线器，单桥和多个连接端口的可配置数据路径网络。 可配置数据路径网络被配置为选择性地提供检测主机的连接端口，通过多端口集线器和连接端口之间的单个桥接器的数据通信，以及用于未检测到主机的连接端口，数据通信 在多端口集线器和绕过单桥的连接端口之间。 相应的方法也如此披露。

公开(公告)号：US20150227485A1

公开(公告)日：2015-08-13

申请号：US14614540

申请日：2015-02-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing MAUNG ,  Suzanne Mary VINING

IPC: G06F13/40 ,  G06F13/42

CPC classification number: G06F13/4022 ,  G06F13/385 ,  G06F13/387 ,  G06F13/4027 ,  G06F13/4221 ,  G06F2213/0042

Abstract: A Universal Serial Bus (USB) adapter includes a USB hub and a USB switch. The USB hub includes a plurality of downstream ports and one upstream port. The USB switch includes a plurality of connections that comprise a first connection configured to be coupled to a first USB apparatus, a second connection configured to be coupled to a second USB apparatus, a third connection coupled to the USB hub's upstream port, and a fourth connection coupled to one of the USB hub's downstream ports. The USB switch is configured to establish a first communication path between the first and second connections that bypasses the USB hub based on a determination that the first USB apparatus is to operate as a USB host, and to establish a second communication path through the USB hub based on a determination that the first USB apparatus is to operate as a client device.

Abstract translation: 通用串行总线（USB）适配器包括USB集线器和USB开关。 USB集线器包括多个下游端口和一个上行端口。 USB开关包括多个连接，其包括配置为耦合到第一USB设备的第一连接，被配置为耦合到第二USB设备的第二连接，耦合到USB集线器的上游端口的第三连接，以及第四连接 连接到USB集线器的下游端口之一。 USB开关被配置为基于第一USB设备要作为USB主机的操作来确定绕过USB集线器的第一和第二连接之间的第一通信路径，以及通过USB集线器建立第二通信路径 基于第一USB设备将作为客户端设备进行操作的确定。

公开(公告)号：US20200313723A1

公开(公告)日：2020-10-01

申请号：US16778864

申请日：2020-01-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Suzanne Mary VINING ,  Gary CHARD ,  Win Naing MAUNG ,  Mark Alan McADAMS

IPC: H04B3/54 ,  G06F13/42

Abstract: At least some aspects of the present disclosure provide for a method. In some examples, the method includes receiving 2-line data in an embedded Universal Serial Bus (eUSB) format. The method further includes encoding the 2-line data into a single signal. The single signal comprises a first symbol corresponding to a first state change of the 2-line data and a second symbol corresponding to a second state change of the 2-line data.

公开(公告)号：US20200285602A1

公开(公告)日：2020-09-10

申请号：US16747719

申请日：2020-01-21

Applicant: Texas Instruments Incorporated

Inventor： Win Naing MAUNG ,  Douglas Edward WENTE ,  James Mark SKIDMORE ,  Bharath Kumar SINGAREDDY ,  Suzanne Mary VINING ,  Huanzhang HUANG

IPC: G06F13/42

Abstract: A system includes an eUSB2 transmitter, wherein the eUSB2 transmitter is configured to provide a data set comprising a data packet, default sync bits, and surplus sync bits. The system also includes an eUSB2 to USB 2.0 repeater coupled to the eUSB2 transmitter, wherein the eUSB2 to USB 2.0 repeater is configured to remove the surplus sync bits and to output the data packet and the default sync bits.

公开(公告)号：US20200242071A1

公开(公告)日：2020-07-30

申请号：US16751411

申请日：2020-01-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing MAUNG ,  Suzanne Mary VINING ,  Yonghui TANG ,  Douglas Edward WENTE ,  Huanzhang HUANG

IPC: G06F13/42

Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.

公开(公告)号：US20240045819A1

公开(公告)日：2024-02-08

申请号：US18193926

申请日：2023-03-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Suzanne M. VINING ,  Julie NIRCHI ,  Win Naing MAUNG ,  Douglas E. WENTE

IPC: G06F13/38 ,  G06F13/40

CPC classification number: G06F13/382 ,  G06F13/4004

Abstract: In some examples, an apparatus includes a circuit configured to receive communication on a first bus. The circuit is also configured to provide the communication on a second bus for a first period of time. The circuit is also configured to monitor a duration of the providing of the communication on the second bus. The circuit is also configured to, responsive to the duration exceeding a threshold amount, stop providing the communication on the second bus for a second period of time.

公开(公告)号：US20230412211A1

公开(公告)日：2023-12-21

申请号：US18461574

申请日：2023-09-06

Applicant: Texas Instruments Incorporated

Inventor： Suzanne Mary VINING ,  Gary CHARD ,  Win Naing MAUNG ,  Mark Alan McADAMS

IPC: H04B3/54 ,  G06F13/42

CPC classification number: H04B3/54 ,  G06F13/4282 ,  G06F2213/0042

Abstract: At least some aspects of the present disclosure provide for a method. In some examples, the method includes receiving 2-line data in an embedded Universal Serial Bus (eUSB) format. The method further includes encoding the 2-line data into a single signal. The single signal comprises a first symbol corresponding to a first state change of the 2-line data and a second symbol corresponding to a second state change of the 2-line data.

公开(公告)号：US20210311898A1

公开(公告)日：2021-10-07

申请号：US17347882

申请日：2021-06-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing MAUNG ,  Yonghui TANG ,  Huanzhang HUANG ,  Douglas Edward WENTE

IPC: G06F13/40 ,  G06F13/42

Abstract: Aspects of the present disclosure provide for a system. In at least some examples, the system includes an embedded Universal Serial Bus 2 (eUSB2) device having a first receiver and a first transmitter, a processor, a second transmitter coupled to the processor, a second receiver coupled to the processor, a drive low circuit coupled to the processor second transmitter, and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver and the first transmitter and at a second end to the second transmitter and the second receiver. The processor is configured to control the drive low circuit to drive the differential signal lines low with a logic ‘0’ to cause the first receiver to receive the logic ‘0’ and a value of a signal present on the differential signal lines to reach about 0 volts.

公开(公告)号：US20210311902A1

公开(公告)日：2021-10-07

申请号：US17348813

申请日：2021-06-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing MAUNG ,  Suzanne Mary VINING

IPC: G06F13/42 ,  G06F1/3206 ,  G06F13/38

Abstract: A serial bus repeater includes a port circuit and a low power state detection circuit. The port circuit is configured to communicate via a serial bus. The low power state detection circuit includes a power state transaction identification circuit and a bus state identification circuit. The power state transaction identification circuit is configured to identify a power state transaction on the serial bus. The power state transaction is indicative of entering a reduced power state. The bus state identification circuit is configured to identify a value of termination resistance on the serial bus that is indicative of entering the reduced power state.

公开(公告)号：US20200073839A1

公开(公告)日：2020-03-05

申请号：US16404494

申请日：2019-05-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing MAUNG ,  Douglas Edward WENTE ,  Mustafa Ulvi ERDOGAN ,  Huanzhang HUANG ,  Saurabh GOYAL ,  Bhupendra SHARMA

IPC: G06F13/38 ,  G06F13/42 ,  H04B3/36

Abstract: Aspects of the disclosure provide for a circuit including a squelch detector having a first input coupled to a first node and configured to receive a positive component of a differential signal with a floating center tap, a second input coupled to a second node and configured to receive a negative component of the differential signal, and an output coupled to a logic circuit, a first resistor coupled between the first node and a third node, a second resistor coupled between the third node and the second node, a third resistor coupled between the first node and a fourth node, a fourth resistor coupled between the fourth node and the second node, a capacitor coupled between the fourth node and a ground terminal, a comparator having a first input coupled to the third node, a second input coupled to a fifth node, and an output coupled to the logic circuit.