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    High efficiency amplifier
    1.
    发明授权
    High efficiency amplifier 失效
    高效放大器

    公开(公告)号：US4897615A

    公开(公告)日：1990-01-30

    申请号：US278094

    申请日：1988-11-30

    Applicant: Tzu-Hung Chen ,  Mahesh Kumar

    Inventor： Tzu-Hung Chen ,  Mahesh Kumar

    IPC: H03F3/30

    CPC classification number: H03F3/3076

    Abstract: Amplifiers operating in push-pull are implemented to obviate input baluns and output signal combiners and their attendant losses. Amplifiers having two signal branches that each receive the input signal and have their signal branch outputs connected directly together. Each branch operates during alternate half cycles of the input signal while direct combining of the branch signal outputs produces a composite signal corresponding to the complete input signal. Each branch includes a matching input circuit and a heterojunction bipolar transistor whcih may be configured in either common collector or common emitter arrangement. The transistors are different since one is an NPN while the other is a PNP but they are selected to have similar direct current and radio frequency characteristics.

    Abstract translation: 实现以推挽操作的放大器，以消除输入平衡 - 不平衡变换器和输出信号组合器及其伴随的损耗。 具有两个信号分支的放大器，每个信号分支接收输入信号并使其信号分支输出直接连接在一起。 每个分支在输入信号的交替半周期期间操作，而分支信号输出的直接组合产生对应于完整输入信号的复合信号。 每个分支包括匹配输入电路，并且异相结双极晶体管可以配置在公共集电极或共同发射极布置中。 晶体管是不同的，因为一个是NPN，而另一个是PNP，但它们被选择为具有类似的直流和射频特性。

    Broadband monolithic balanced mixer apparatus
    2.
    发明授权
    Broadband monolithic balanced mixer apparatus 失效
    宽带单片平衡混频器

    公开(公告)号：US4896374A

    公开(公告)日：1990-01-23

    申请号：US282083

    申请日：1988-12-09

    Applicant: Raymond M. Waugh ,  Tzu-Hung Chen ,  Mahesh Kumar

    Inventor： Raymond M. Waugh ,  Tzu-Hung Chen ,  Mahesh Kumar

    IPC: H03D7/14

    CPC classification number: H03D7/1441 ,  H03D7/1408 ,  H03D7/1483 ,  H03D2200/0043

    Abstract: A broadband monolithic balanced mixer employs a unidirectional active 180.degree. hybrid. The hybrid is fabricated utilizing two active signal splitters, two all pass phase shifting networks and two active signal combiners. The all pass networks provide a controlled phase response while the absolute phase of the network varies with frequency whereby the frequency difference between the two networks remains constant at 180.degree. over a very broad frequency range. Because the phase varies with frequency, the source and load impedance are rendered equal and resistive. Thus the above-described apparatus employs a common source FET with feedback for the signal splitter and a common gate FET for the combiner. Matching networks are used at all four ports of the active hybrid to achieve the desired match over the desired frequency ranges. The outputs of the hybrid are applied to suitable mixer circuits including FET or diode devices.

    Abstract translation: 宽带单片平衡混频器采用单向有源180°混合。 使用两个有源信号分离器，两个全通相移网络和两个有源信号组合器来制造混合器。 所有通过网络提供受控的相位响应，而网络的绝对相位随频率而变化，由此两个网络之间的频率差在非常宽的频率范围内保持恒定在180度。 由于相位随频率而变化，所以源极和负载阻抗呈现相等和阻性。 因此，上述装置采用具有用于信号分离器的反馈的公共源FET和用于组合器的公共栅极FET。 在有源混合器的所有四个端口上使用匹配网络以在期望的频率范围内实现期望的匹配。 混合器的输出被施加到包括FET或二极管器件的合适的混频器电路。

    ATTENUATED MYCOPLASMA GALLISEPTICUM STRAINS
    3.
    发明申请
    ATTENUATED MYCOPLASMA GALLISEPTICUM STRAINS 有权
    衰老的MYCOPLASMA GALLISEPTICUM菌株

    公开(公告)号：US20090068232A1

    公开(公告)日：2009-03-12

    申请号：US12207750

    申请日：2008-09-10

    Applicant: Mahesh Kumar ,  Muhammad Ayub Khan

    Inventor： Mahesh Kumar ,  Muhammad Ayub Khan

    IPC: A61K39/00 ,  C12N1/20 ,  C12Q1/02 ,  C12Q1/68 ,  G01N33/53 ,  A01K67/027 ,  A61P31/00

    CPC classification number: C12N1/36 ,  A61K39/0241 ,  A61K2039/522 ,  A61K2039/552 ,  C12N1/20 ,  C12R1/35

    Abstract: The present invention provides live, attenuated Mycoplasma gallisepticum bacteria that exhibit reduced expression of a protein identified as MGA_0621. In certain embodiments, the attenuated bacteria may additionally exhibit reduced expression of one or more proteins selected from the group consisting of pyruvate dehydrogenase, phosphopyruvate hydratase, 2-deoxyribose-5-phosphate aldolase, and ribosomal protein L35, relative to a wild-type M. gallisepticum bacterium. Also provided are vaccines and vaccination methods involving the use of the live, attenuated M. gallisepticum bacteria, and methods for making live attenuated M. gallisepticum bacteria. An exemplary live, attenuated strain of M. gallisepticum is provided, designated MGx+47, which was shown by proteomics analysis to exhibit significantly reduced expression of MGA_0621, and was shown to be safe and effective when administered as a vaccine against M. gallisepticum infection in chickens.

    Abstract translation: 本发明提供活的，减毒的鸡毒支原体细菌，其表现出被鉴定为MGA_0621的蛋白质的表达降低。 在某些实施方案中，相对于野生型M，减毒细菌可另外表现出一种或多种选自丙酮酸脱氢酶，磷酸丙酮酸水合酶，2-脱氧核糖-5-磷酸醛缩酶和核糖体蛋白L35的蛋白质​​的表达降低 胆汁败霉菌 还提供了涉及使用活的，减毒的金黄色葡萄球菌细菌的疫苗和疫苗接种方法，以及用于制造活的减毒的金黄色葡萄球菌细菌的方法。 提供了一种示例性的活的减毒毒株的菌株，命名为MGx + 47，通过蛋白质组学分析显示出显着降低的MGA_0621的表达，并且当作为针对鸡链球菌毒素感染的疫苗施用时被证明是安全和有效的 在鸡中

    Digitally controlled monolithic active phase shifter apparatus having a cascode configuration
    7.
    发明授权
    Digitally controlled monolithic active phase shifter apparatus having a cascode configuration 失效
    具有共源共栅配置的数字控制单片有源移相器装置

    公开(公告)号：US4994773A

    公开(公告)日：1991-02-19

    申请号：US257482

    申请日：1988-10-13

    Applicant: Tzu H. Chen ,  Mahesh Kumar

    Inventor： Tzu H. Chen ,  Mahesh Kumar

    IPC: H03H11/20

    CPC classification number: H03H11/20

    Abstract: A digitally controlled active phase shifter with vernier control consists of a 180 degree phase bit in series with a 90 degree bit and a digitally controlled active vector generator with vernier control. The digitally controlled active vector generator consists of an active power divider with digitally adjustable amplitude, a pair of phase delay networks with an active power combiner employing vernier control. The power divider consists of two sets of parallel pairs of FET's in cascode configuration with all input nodes connected together and all output nodes from the same set tied together. The FET at the output node of each pair is a common gate configuration with its gate RF grounded through a bypass capacitor. The gate bias voltage is applied to the common gate FET to switch it ON or OFF to thereby provide a set of desired signal amplitudes which can be obtained by selecting the gain of each of the cascode stages in each of the parallel pairs. Two output signals from the power divider are fed into a pair of phase delay networks to get 90 degree phase differences. The two 90 degree out of phase signals are then combined by an active power combiner which consists of two pairs of FET's in cascode configuration with their output nodes connected together. The combined signal while maintaining constant amplitude can have phase variations beteen 0-90 degrees according to the amplitude ratio of the two 90 degree out of phase signals. The gate bias voltage applied to the two common gate FET's of the power combiner can be varied continuously to give additional phase variations of the combined signal at the output.

    Abstract translation: 具有游标控制的数字控制有源移相器由与90度位串联的180度相位位和具有游标控制的数字控制有源矢量发生器组成。 数字控制有源矢量发生器由具有数字可调振幅的有功功率分配器，一对具有采用游标控制的有功功率组合器的相位延迟网络组成。 功率分配器由共同体组态中的两组并联对的FET组成，所有输入节点连接在一起，并将来自同一组的所有输出节点捆绑在一起。 每对输出节点的FET是通过旁路电容接地的栅极RF的公共栅极配置。 栅极偏置电压施加到公共栅极FET以将其导通或截止，从而提供一组期望的信号幅度，其可以通过选择每个并联对中的每个共源共栅级的增益来获得。 来自功率分配器的两个输出信号被馈送到一对相位延迟网络中以获得90度的相位差。 然后，两个90度异相信号由有源功率组合器组合，该有功功率组合器由串联组合中的两对FET组成，其输出节点连接在一起。 保持恒定幅度的组合信号可以根据两个90度异相信号的振幅比具有0-90度的相位变化。 施加到功率组合器的两个公共栅极FET的栅极偏置电压可以连续变化，以在输出端产生组合信号的附加相位变化。

    Microwave frequency power combiner
    8.
    发明授权
    Microwave frequency power combiner 失效
    微波频率功率组合器

    公开(公告)号：US4609889A

    公开(公告)日：1986-09-02

    申请号：US630839

    申请日：1984-07-13

    Applicant: Mahesh Kumar

    Inventor： Mahesh Kumar

    IPC: H03H11/36

    CPC classification number: H03H11/36

    Abstract: An in-phase power combiner is constructed of a double field-effect transistor having a common drain, first and second gates and first and second sources. The gates are adapted to receive radio frequency signals of powers P1and P2, where P1=P2, to be power combined. The combined power output signal P equal to at least P1+P2 appears at the drain. An alternative power combiner for producing power combination of two unequal power input signals is constructed of a double dual gate FET having, in addition to the above-mentioned elements, third and fourth gates.

    Abstract translation: 同相功率组合器由具有共同漏极，第一和第二栅极以及第一和第二源极的双场效应晶体管构成。 门适于接收功率P1和P2的射频信号，其中P1 = P2，以被功率组合。 在漏极处出现等于至少P1 + P2的组合功率输出信号P. 用于产生两个不相等功率输入信号的功率组合的替代功率组合器由除了上述元件之外还具有第三和第四栅极的双重双栅极FET构成。

    DC capacitor balancing
    10.
    发明授权
    DC capacitor balancing 有权
    直流电容平衡

    公开(公告)号：US08294306B2

    公开(公告)日：2012-10-23

    申请号：US12725053

    申请日：2010-03-16

    Applicant: Mahesh Kumar ,  Srikanthan Sridharan ,  Jaganath Krishnan

    Inventor： Mahesh Kumar ,  Srikanthan Sridharan ,  Jaganath Krishnan

    IPC: H01H9/54

    CPC classification number: H02J3/1842 ,  H02J7/0016 ,  H02J7/345 ,  Y02E40/22 ,  Y02T10/7055 ,  Y10T307/944

    Abstract: Methods and devices for balancing voltages of capacitors in an electronic circuit are provided. The device includes a chopper circuit having a chopper inductor. Further, the chopper circuit may detect voltages across capacitors as well as an output current of the electronic circuit. In addition, the device may include a chopper control unit receiving the output current then generating a signal representing charging of the chopper inductor based on the output current. Also, the chopper control unit may receive the voltages across the capacitors and detect an imbalance between the voltages based on a polarity of the output current. Additionally, the chopper control unit may transfer of charge between the two capacitors, using the chopper inductor. Further, the chopper inductor is substantially discharged, during the transfer of charge between the capacitors.

    Abstract translation: 提供了用于平衡电子电路中的电容器的电压的方法和装置。 该装置包括具有斩波电感器的斩波电路。 此外，斩波电路可以检测电容器两端的电压以及电子电路的输出电流。 此外，该装置可以包括接收输出电流的斩波控制单元，然后基于输出电流产生表示斩波电感器的充电的信号。 此外，斩波器控制单元可以接收电容器两端的电压，并且基于输出电流的极性来检测电压之间的不平衡。 此外，斩波控制单元可以使用斩波电感器在两个电容器之间传送电荷。 此外，在电容器之间的电荷转移期间，斩波电感器基本上被放电。

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