公开(公告)号：US4896204A

公开(公告)日：1990-01-23

申请号：US224172

申请日：1988-07-25

申请人： Yoshihiro Hirata ,  Reiji Tamaki ,  Takeshi Noguchi ,  Junichi Arima ,  Kenji Saitoh ,  Shigeru Harada

发明人： Yoshihiro Hirata ,  Reiji Tamaki ,  Takeshi Noguchi ,  Junichi Arima ,  Kenji Saitoh ,  Shigeru Harada

IPC分类号： H01L23/522 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/532

CPC分类号： H01L23/53223 ,  H01L23/5329 ,  H01L2924/0002

摘要： An Al layer (6) is first formed to cover an opening region (9) for interconnection in a semiconductor device. Then, an Al-Si-Ti layer (7) having a higher degree of hardness than that of the Al layer (6) is formed on the Al layer (6) and subsequently a mixture layer (8) of aluminum hydrate and aluminum oxide is formed on the surface of the Al-Si-Ti layer (7). Thus, a multilayered film of electrode and interconnection (11) is formed.

摘要翻译： 首先形成Al层（6）以覆盖用于半导体器件中的互连的开口区域（9）。 然后，在Al层（6）上形成硬度比Al层（6）高的Al-Si-Ti层（7），随后形成水合铝和氧化铝的混合层（8） 形成在Al-Si-Ti层（7）的表面上。 因此，形成电极和互连（11）的多层膜。

公开(公告)号：US4983547A

公开(公告)日：1991-01-08

申请号：US260390

申请日：1988-10-20

申请人： Junichi Arima ,  Yoshihiro Hirata ,  Hiroshi Harada ,  Isao Furuta ,  Shigeru Harada ,  Reiji Tamaki

发明人： Junichi Arima ,  Yoshihiro Hirata ,  Hiroshi Harada ,  Isao Furuta ,  Shigeru Harada ,  Reiji Tamaki

IPC分类号： H01L23/00 ,  H01L21/28

CPC分类号： H01L21/28097 ,  Y10S148/147

摘要： In a method of forming a metallic silicide film on a substrate, a metallic silicide film containing silicon at a concentration higher than stoichiometric, is deposited on a substrate. A film of aluminum or aluminum alloy is then deposited on the metallic silicide film. Subsequently, a heat treatment is conducted to cause precipitation of silicon from the metallic silicide film to the aluminum, thereby to lower the silicon concentration in the silicide film.

摘要翻译： 在基板上形成金属硅化物膜的方法中，将含有浓度高于化学计量的硅的金属硅化物膜沉积在基板上。 然后将铝或铝合金膜沉积在金属硅化物膜上。 随后，进行热处理以使硅从金属硅化物膜析出至铝，从而降低硅化物膜中的硅浓度。

公开(公告)号：US4731516A

公开(公告)日：1988-03-15

申请号：US917124

申请日：1986-10-09

申请人： Takeshi Noguchi ,  Yoshihiro Hirata ,  Junichi Arima ,  Eisuke Tanaka ,  Reiji Tamaki ,  Masanori Obata

发明人： Takeshi Noguchi ,  Yoshihiro Hirata ,  Junichi Arima ,  Eisuke Tanaka ,  Reiji Tamaki ,  Masanori Obata

IPC分类号： B23K26/00 ,  H01L21/20 ,  H01L21/268 ,  H01L21/304

CPC分类号： H01L21/268 ,  H01L21/2026 ,  Y10S117/904

摘要： The rough ground rear surface 13b of a semiconductor wafer 11 is mirror-polished by localized irradiation with a focused laser beam 21. The wafer is moved relative to the beam, and the melt puddle formed by the beam thereafter recrystallizes at its trailing edge 24 to leave a mirror smooth rear surface 13c.

摘要翻译： 通过用聚焦激光束21的局部照射将半导体晶片11的粗糙的后表面13b镜面抛光。晶片相对于光束移动，并且由光束形成的熔融熔池随后在其后缘24处重结晶至 留下镜面光滑的后表面13c。

公开(公告)号：US4884120A

公开(公告)日：1989-11-28

申请号：US16787

申请日：1987-02-20

申请人： Hiroshi Mochizuki ,  Reiji Tamaki ,  Junichi Arima ,  Masaaki Ikegami ,  Eisuke Tanaka ,  Kenji Saito

发明人： Hiroshi Mochizuki ,  Reiji Tamaki ,  Junichi Arima ,  Masaaki Ikegami ,  Eisuke Tanaka ,  Kenji Saito

IPC分类号： H01L23/522 ,  H01L21/28 ,  H01L21/316 ,  H01L21/768 ,  H01L27/00 ,  H01L29/49

CPC分类号： H01L21/31683 ,  H01L21/7684 ,  H01L21/76877 ,  H01L21/76888

摘要： An improved interconnection structure and method for forming the interconnection in a semiconductor device having multilayered interconnection structure in which a contact hole for electrically connecting a first layer interconnection to a predetermined region of a semiconductor substrate and a through hole for electrically connecting a second layer interconnection to the first layer interconnection are formed in the regions overlapping with each other in planer layout. In the interconnection structure of the present invention, hillocks effective to compensate for the contact hole step are formed in the first layer interconnection only in the region of the contact hole of the first layer interconnection. In the method for forming the interconnection according to the present invention, a first layer interconnection is formed and a chemical conversion process is selectively performed to form a film which is more rigid than the first layer interconnection film on a predetermined region of the first layer interconnection film, and then a heat process is performed to generate hillocks only at the region of the contact hole of the first layer interconnection film. The second layer interconnection film is formed thereafter.

摘要翻译： 一种用于在具有多层互连结构的半导体器件中形成互连的改进的互连结构和方法，其中用于将第一层互连电连接到半导体衬底的预定区域的接触孔和用于将第二层互连电连接到 第一层互连形成在以平面布置彼此重叠的区域中。 在本发明的互连结构中，仅在第一层互连的接触孔的区域中，在第一层互连中形成有效补偿接触孔台阶的小丘。 在根据本发明的形成互连的方法中，形成第一层互连，并且选择性地执行化学转换处理以在第一层互连的预定区域上形成比第一层互连膜更刚性的膜 膜，然后进行热处理，仅在第一层互连膜的接触孔的区域产生小丘。 此后形成第二层互连膜。

公开(公告)号：US4942451A

公开(公告)日：1990-07-17

申请号：US249907

申请日：1988-09-27

申请人： Reiji Tamaki ,  Shigeru Harada

发明人： Reiji Tamaki ,  Shigeru Harada

IPC分类号： H01L21/027 ,  H01L21/60

CPC分类号： H01L21/0274 ,  H01L21/0276 ,  H01L24/11 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01082 ,  H01L2924/01322

摘要： A semiconductor device comprises a semiconductor substrate containing silicon as a constituent element, an impurity diffused layer formed in a predetermined region of the semiconductor substrate, an underlayer oxide film formed on the surface of the semiconductor substrate, an Al-Si alloy interconnection electrically connected to the impurity diffused layer through a contact hole and formed in a predetermined region on the underlayer insulating film, and an antireflection coating comprising a layer of an Al-Si-Sb alloy or a layer of an Al-Si-Sn alloy formed on the alloy interconnection.

摘要翻译： 半导体器件包括含有硅作为构成元素的半导体衬底，形成在半导体衬底的预定区域中的杂质扩散层，形成在半导体衬底的表面上的下层氧化膜，电连接到 杂质扩散层通过接触孔形成在下层绝缘膜上的预定区域中，以及抗反射涂层，其包含Al-Si-Sb合金层或形成在合金上的Al-Si-Sn合金层 互连。

公开(公告)号：US5260604A

公开(公告)日：1993-11-09

申请号：US508507

申请日：1990-04-12

申请人： Shigeru Harada ,  Hisao Masuda ,  Reiji Tamaki

发明人： Shigeru Harada ,  Hisao Masuda ,  Reiji Tamaki

IPC分类号： H01L23/532 ,  H02L23/48

CPC分类号： H01L23/53219 ,  H01L23/532 ,  H01L2924/0002

摘要： In a semiconductor device, an impurity diffused layer serving as an active region is formed in a predetermined region of the surface of a semiconductor substrate of silicon, an underlayer insulating film is formed on the semiconductor substrate for the purpose of protecting and stabilizing the surface of the semiconductor substrate, and an interconnection electrically connected to the impurity diffused layer through a contact hole and formed on an Al-Si-Sn alloy, an Al-Si-Sb alloy or alloys having Ti added to the respective alloys, so that occurrence of an alloy pit and a silicon nodule is prevented. In addition, a completed protective film is formed on the interconnection and the underlayer insulating film and an aperture in a bonding pad region is formed in a predetermined region of the completed protective film, so that the interconnection and the bonding pad are electrically connected to each other. The proportion of silicon and other materials in the alloy are controlled to simultaneously avoid alloy pit and silicon nodule defects both at the contact hole and throughout the alloy conductor.

摘要翻译： 在半导体器件中，在硅的半导体衬底的表面的预定区域中形成用作有源区的杂质扩散层，为了保护和稳定表面的目的，在半导体衬底上形成下层绝缘膜 半导体衬底以及通过接触孔与杂质扩散层电连接并且在Al-Si-Sn合金，Al-Si-Sb合金或其合金上添加有Ti的合金形成的互连，从而发生 防止了合金凹坑和硅结节。 此外，在互连和下层绝缘膜上形成完整的保护膜，并且在完成的保护膜的预定区域中形成焊盘区域中的孔，使得互连和焊盘与每个 其他。 控制合金中硅和其他材料的比例，以同时避免接触孔和整个合金导体中的合金凹坑和硅结节缺陷。

公开(公告)号：US5481137A

公开(公告)日：1996-01-02

申请号：US246375

申请日：1994-05-18

申请人： Shigeru Harada ,  Hisao Masuda ,  Reiji Tamaki

发明人： Shigeru Harada ,  Hisao Masuda ,  Reiji Tamaki

IPC分类号： H01L23/532 ,  H01L23/48 ,  H01L29/34 ,  H01L29/46 ,  H01L29/62

CPC分类号： H01L23/53219 ,  H01L23/532 ,  H01L2924/0002

摘要： In a semiconductor device, an impurity diffused layer serving as an active region is formed in a predetermined region of the surface of a semiconductor substrate of silicon, an underlayer insulating film is formed on the semiconductor substrate for the purpose of protecting and stabilizing the surface of the semiconductor substrate, and an interconnection electrically connected to the impurity diffused layer through a contact hole and formed on an Al-Si-Sn alloy, an Al-Si-Sb alloy or alloys having Ti added to the respective alloys, so that occurrence of an alloy pit and a silicon nodule is prevented. In addition, a completed protective film is formed on the interconnection and the underlayer insulating film and an aperture in a bonding pad region is formed in a predetermined region of the completed protective film, so that the interconnection and the bonding pad are electrically connected to each other. The proportion of silicon and other materials in the alloy are controlled to simultaneously avoid alloy pit and silicon nodule defects both at the contact hole and throughout the alloy conductor.

摘要翻译： 在半导体器件中，在硅的半导体衬底的表面的预定区域中形成用作有源区的杂质扩散层，为了保护和稳定表面的目的，在半导体衬底上形成下层绝缘膜 半导体衬底以及通过接触孔与杂质扩散层电连接并且在Al-Si-Sn合金，Al-Si-Sb合金或其合金上添加有Ti的合金形成的互连，从而发生 防止了合金凹坑和硅结节。 此外，在互连和下层绝缘膜上形成完整的保护膜，并且在完成的保护膜的预定区域中形成焊盘区域中的孔，使得互连和焊盘与每个 其他。 控制合金中硅和其他材料的比例，以同时避免接触孔和整个合金导体中的合金凹坑和硅结节缺陷。