公开(公告)号：US20200027785A1

公开(公告)日：2020-01-23

申请号：US16583749

申请日：2019-09-26

Applicant: Applied Materials, Inc.

Inventor： Susmit Singha Roy ,  Srinivas Gandikota ,  Pramit Manna ,  Abhijit Basu Mallick

IPC: H01L21/768 ,  H01L21/02 ,  H01L27/11582 ,  H01L27/11556 ,  H01L23/528 ,  H01L21/285 ,  H01L23/532 ,  H01L21/311

Abstract: Methods of dep-etch in semiconductor devices (e.g. V-NAND) are described. A metal layer is deposited in a feature. The metal layer is removed by low temperature atomic layer etching by oxidizing the surface of the metal layer and etching the oxide in a layer-by-layer fashion. After removal of the metal layer, the features are filled with a metal.

公开(公告)号：US20190385907A1

公开(公告)日：2019-12-19

申请号：US16445654

申请日：2019-06-19

Applicant: Applied Materials, Inc.

Inventor： Samuel E. Gottheim ,  Eswaranand Venkatasubramanian ,  Pramit Manna ,  Abhijit Basu Mallick

IPC: H01L21/768 ,  H01L21/683 ,  H01L21/02 ,  H01L21/67 ,  H01L21/762 ,  H01J37/32

Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of high quality gapfill. Some embodiments utilize chemical vapor deposition, plasma vapor deposition, physical vapor deposition and combinations thereof to deposit the gapfill. The gapfill is of high quality and similar in properties to similarly composed bulk materials.

公开(公告)号：US10480066B2

公开(公告)日：2019-11-19

申请号：US16123437

申请日：2018-09-06

Applicant: Applied Materials, Inc.

Inventor： Yong Wu ,  Srinivas Gandikota ,  Abhijit Basu Mallick

IPC: H01L21/28 ,  C23C16/14 ,  C23C16/455 ,  H01L21/285

Abstract: A method of forming conformal amorphous metal films is disclosed. A method of forming crystalline metal films with a predetermined orientation is also disclosed. An amorphous nucleation layer is formed on a substrate surface. An amorphous metal layer is formed from the nucleation layer by atomic substitution. A crystalline metal layer is deposited on the amorphous metal layer by atomic layer deposition.

公开(公告)号：US10475642B2

公开(公告)日：2019-11-12

申请号：US15491331

申请日：2017-04-19

Applicant: Applied Materials, Inc.

Inventor： Eswaranand Venkatasubramanian ,  Srinivas Gandikota ,  Kelvin Chan ,  Atashi Basu ,  Abhijit Basu Mallick

IPC: H01L21/02 ,  H01L29/66 ,  C23C16/455 ,  C23C16/40 ,  H01L29/78 ,  H01L29/51

Abstract: A microelectronic device on a semiconductor substrate comprises: a gate electrode; and a spacer adjacent to the gate electrode, the spacer comprising: a the low-k dielectric film comprising one or more species of vanadium oxide, which is optionally doped, and an optional silicon nitride or oxide film. Methods comprise depositing a low-k dielectric film optionally sandwiched by a silicon nitride or oxide film to form a spacer adjacent to a gate electrode of a microelectronic device on a semiconductor substrate, wherein the low-k dielectric film comprises a vanadium-containing film.

公开(公告)号：US10410872B2

公开(公告)日：2019-09-10

申请号：US15695269

申请日：2017-09-05

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Ziqing Duan ,  Milind Gadre ,  Praket P. Jha ,  Abhijit Basu Mallick ,  Deenesh Padhi

IPC: H01L21/285 ,  C23C16/30 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/3205 ,  C23C16/04 ,  C23C16/24 ,  H01L21/033

Abstract: Implementations described herein generally relate to the fabrication of integrated circuits and particularly to the deposition of a boron-doped amorphous silicon layers on a semiconductor substrate. In one implementation, a method of forming a boron-doped amorphous silicon layer on a substrate is provided. The method comprises depositing a predetermined thickness of a sacrificial dielectric layer over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate, depositing conformally a predetermined thickness of a boron-doped amorphous silicon layer on the patterned features and the exposed upper surface of the substrate and selectively removing the boron-doped amorphous silicon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers formed from the boron-doped amorphous silicon layer.

公开(公告)号：US10410869B2

公开(公告)日：2019-09-10

申请号：US15633366

申请日：2017-06-26

Applicant: Applied Materials, Inc.

Inventor： Susmit Singha Roy ,  Kelvin Chan ,  Hien Minh Le ,  Sanjay Kamath ,  Abhijit Basu Mallick ,  Srinivas Gandikota ,  Karthik Janakiraman

IPC: C23C16/06 ,  H01L21/3205 ,  C23C16/505 ,  H01L21/285 ,  H01L21/02 ,  H01L21/768 ,  C23C16/02 ,  C23C16/40 ,  C23C28/00 ,  H01L27/11582

Abstract: Implementations described herein generally relate to a method for forming a metal layer and to a method for forming an oxide layer on the metal layer. In one implementation, the metal layer is formed on a seed layer, and the seed layer helps the metal in the metal layer nucleate with small grain size without affecting the conductivity of the metal layer. The metal layer may be formed using plasma enhanced chemical vapor deposition (PECVD) and nitrogen gas may be flowed into the processing chamber along with the precursor gases. In another implementation, a barrier layer is formed on the metal layer in order to prevent the metal layer from being oxidized during subsequent oxide layer deposition process. In another implementation, the metal layer is treated prior to the deposition of the oxide layer in order to prevent the metal layer from being oxidized.

公开(公告)号：US10403542B2

公开(公告)日：2019-09-03

申请号：US16003827

申请日：2018-06-08

Applicant: Applied Materials, Inc.

Inventor： Susmit Singha Roy ,  Ziqing Duan ,  Abhijit Basu Mallick ,  Praburam Gopalraja

IPC: H01L21/768 ,  H01L21/311 ,  H01J37/32 ,  H01L23/532

Abstract: A first metallization layer comprises a set of first conductive lines that extend along a first direction on a first dielectric layer on a substrate. Pillars are formed on recessed first dielectric layers and a second dielectric layer covers the pillars. A dual damascene etch provides a contact hole through the second dielectric layer and an etch removes the pillars to form air gaps.

公开(公告)号：US10403502B2

公开(公告)日：2019-09-03

申请号：US15882204

申请日：2018-01-29

Applicant: Applied Materials, Inc.

Inventor： Eswaranand Venkatasubramanian ,  Abhijit Basu Mallick ,  Susmit Singha Roy ,  Takehito Koshizawa

IPC: H01L21/033 ,  H01L21/02 ,  C23C16/50 ,  C23C16/34 ,  H01L21/311 ,  C23C16/02 ,  C23C16/32 ,  C23C16/505

Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of hardmask films on a substrate. In one implementation, a method of forming a hardmask layer on a substrate is provided. The method comprises forming a seed layer on a substrate by supplying a seed layer gas mixture in a processing chamber. The method further includes forming a transition layer comprising tungsten, boron and carbon on the seed layer by supplying a transition layer gas mixture in the processing chamber. The method further includes forming a bulk hardmask layer comprising tungsten, boron and carbon on the transition layer by supplying a main deposition gas mixture in the processing chamber.

公开(公告)号：US20190259652A1

公开(公告)日：2019-08-22

申请号：US16393357

申请日：2019-04-24

Applicant: Applied Materials, Inc.

Inventor： Susmit Singha Roy ,  Yihong Chen ,  Kelvin Chan ,  Abhijit Basu Mallick ,  Srinivas Gandikota ,  Pramit Manna

IPC: H01L21/762 ,  H01L29/43 ,  H01L21/28 ,  H01L21/32 ,  H01L21/8234

Abstract: Methods comprising forming a film on at least one feature of a substrate surface are described. The film is expanded to fill the at least one feature and cause growth of the film from the at least one feature. Methods of forming self-aligned vias are also described.

公开(公告)号：US10347488B2

公开(公告)日：2019-07-09

申请号：US15268797

申请日：2016-09-19

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Wei Tang ,  Pramit Manna ,  Abhijit Basu Mallick ,  Srinivas Gandikota

IPC: H01L21/02 ,  H01L21/033

Abstract: Methods for forming a titanium-containing hard mask film on a substrate surface by exposing the substrate surface to a titanium-containing precursor. The titanium-containing hard mask comprises one or more of silicon, oxygen or carbon atoms and, optionally, nitrogen atoms.