公开(公告)号：US6133610A

公开(公告)日：2000-10-17

申请号：US9445

申请日：1998-01-20

申请人： Ronald J. Bolam ,  Subhash B. Kulkarni ,  Dominic J. Schepis

发明人： Ronald J. Bolam ,  Subhash B. Kulkarni ,  Dominic J. Schepis

IPC分类号： H01L21/336 ,  H01L21/74 ,  H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L29/00

CPC分类号： H01L29/66772 ,  H01L21/743 ,  H01L21/76264 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78636 ,  H01L29/78648 ,  H01L21/76283

摘要： An SOI chip having an isolation barrier. The SOI chip includes a substrate, an oxide layer deposited on the substrate, and a silicon layer deposited on the oxide layer. A gate is deposited above the silicon layer. A first metal contact is deposited above the gate to form an electrical contact with the gate. Second and third metal contacts are deposited to form electrical contacts with the silicon layer. The isolation barrier extends through the silicon layer and the oxide layer, and partially into the substrate, to block impurities in the oxide layer outside the isolation barrier from diffusing into the oxide layer inside the isolation barrier. The isolation barrier surrounds the gate, the first metal contact, the second metal contact, and the third metal contact--which define an active chip area inside the isolation barrier. A method of manufacturing the SOI chip is also disclosed.

摘要翻译： 具有隔离屏障的SOI芯片。 SOI芯片包括衬底，沉积在衬底上的氧化物层和沉积在氧化物层上的硅层。 栅极沉积在硅层上方。 第一金属触点沉积在栅极上方以形成与栅极的电接触。 沉积第二和第三金属触点以形成与硅层的电接触。 隔离屏障延伸穿过硅层和氧化物层，并部分地延伸到衬底中，以阻挡隔离屏障之外的氧化物层中的杂质扩散到隔离屏障内部的氧化物层中。 隔离屏障围绕栅极，第一金属触点，第二金属触点和第三金属触点，其限定隔离屏障内部的有源芯片区域。 还公开了制造SOI芯片的方法。

公开(公告)号：US5585663A

公开(公告)日：1996-12-17

申请号：US511565

申请日：1995-08-04

申请人： Raschid J. Bezama ,  Dominic J. Schepis ,  Krishna Seshan

发明人： Raschid J. Bezama ,  Dominic J. Schepis ,  Krishna Seshan

IPC分类号： H01L21/82 ,  H01L23/367 ,  H01L23/525 ,  H01L29/00

CPC分类号： H01L23/5256 ,  H01L23/3672 ,  H01L2924/0002 ,  Y10S438/922

摘要： An electrically programmable fuse buried under quartz and layers of polyimide with a specific structure to enhance its "thermal" capabilities. The fuse is designed to "blow" and cool off quickly so as not to cause damage to areas above and surrounding the fuse. A passivation layer is added above the fuse to act as a heat sink and absorb and redistribute the heat generated from one localized area to a broader and cooler area. The materials used for the fuse and the heat sink are selected to be compatible with both oxide and polyimide personalization schemes. Modeling of the fuse enables optimizing the characteristics of the fuse, particularly to transmit to the surface of the passivation layer the thermal wave created during programming of the fuse.

摘要翻译： 埋在石英下的电可编程熔丝和具有特定结构的聚酰亚胺层，以增强其“热”能力。 保险丝设计为“吹”并快速冷却，以免对保险丝上方和周围的区域造成损坏。 保险丝上方加上钝化层，作为散热片，吸收并重新分配从一个局部区域产生的热量到较宽和较冷的区域。 用于保险丝和散热器的材料被选择为与氧化物和聚酰亚胺个性化方案兼容。 保险丝的建模可以优化保险丝的特性，特别是在保险丝编程期间向钝化层的表面传输热波。

公开(公告)号：US5485032A

公开(公告)日：1996-01-16

申请号：US355206

申请日：1994-12-08

申请人： Dominic J. Schepis ,  Kris V. Srikrishnan ,  Seshadri Subbanna ,  Manu J. Tejwani

发明人： Dominic J. Schepis ,  Kris V. Srikrishnan ,  Seshadri Subbanna ,  Manu J. Tejwani

IPC分类号： H01L21/82 ,  H01L21/768 ,  H01L23/525 ,  H01L29/00

CPC分类号： H01L23/5254 ,  H01L21/76888 ,  H01L21/76894 ,  H01L23/5252 ,  H01L2924/0002 ,  Y10S438/933

摘要： A programmable antifuse element comprising adjacent bodies of germanium and aluminum or aluminum allow form a low resistance connection of good mechanical and thermal properties when heated to a temperature where alloying of the aluminum and germanium occurs. Heating for the purpose of programming the antifuse element can be done by electrical resistance heating in the-germanium, which may be doped to achieve a desired resistance value, or by laser irradiation. Due to the high resistance of intrinsic or lightly doped germanium, a resistance change ratio of greater than 10,000:1 is achieved.

摘要翻译： 包括锗和铝或铝的相邻体的可编程反熔丝元件在加热到发生铝和锗的合金化的温度时形成良好机械和热性能的低电阻连接。 用于编程反熔丝元件的加热可以通过锗中的电阻加热来实现，其可以被掺杂以实现期望的电阻值，或通过激光照射。 由于本征或轻掺杂锗的高电阻，实现了大于10,000:1的电阻变化率。

公开(公告)号：US5444287A

公开(公告)日：1995-08-22

申请号：US292901

申请日：1994-08-10

申请人： Raschid J. Bezama ,  Dominic J. Schepis ,  Krishna Seshan

发明人： Raschid J. Bezama ,  Dominic J. Schepis ,  Krishna Seshan

IPC分类号： H01H85/00 ,  H01H85/02 ,  H01H85/046 ,  H01H85/12 ,  H01L23/525 ,  H01L23/58 ,  H01L29/167 ,  H01L23/48 ,  H01L29/207

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  Y10S148/055

摘要： A noise immune fuse having sub-micron dimensions which can be programmed by an electrically and thermally synchronized event. The fuse includes a pair of fuse links in close proximity of each other, a layer of thermally conductive and electrically insulating material thermally coupling the two links forming the pair, and means for programming the first link by prompting the second link to gate the energy transfer between the links via the coupling layer. By combining thermal and electrical pulses to perform the programming function, the reliability of the fuse structure is greatly enhanced when compared to that of a single element fuse.

摘要翻译： 具有亚微米尺寸的噪声免疫保险丝，可通过电和热同步事件进行编程。 熔丝包括彼此紧密相邻的一对熔丝链，热耦合形成该对的两个连接的导热和电绝缘材料层，以及用于通过提示第二连接件对能量传递进行栅极编程的装置 通过耦合层在链路之间。 通过组合热和电脉冲来执行编程功能，与单个元件熔断器相比，熔丝结构的可靠性大大提高。

公开(公告)号：US5314840A

公开(公告)日：1994-05-24

申请号：US996767

申请日：1992-12-18

申请人： Dominic J. Schepis ,  Kris V. Srikrishnan ,  Seshardi Subbanna ,  Manu J. Tijwani

发明人： Dominic J. Schepis ,  Kris V. Srikrishnan ,  Seshardi Subbanna ,  Manu J. Tijwani

IPC分类号： H01L21/82 ,  H01L21/768 ,  H01L23/525 ,  H01L21/44 ,  H01L21/48

CPC分类号： H01L23/5254 ,  H01L21/76888 ,  H01L21/76894 ,  H01L23/5252 ,  H01L2924/0002 ,  Y10S438/933

摘要： A programmable antifuse element comprising adjacent bodies of germanium and aluminum or aluminum alloy form forming a low resistance connection of good mechanical and thermal properties when heated to a temperature where alloying of the aluminum and germanium occurs. Heating for the purpose of programming the antifuse element can be done by electrical resistance heating in the germanium, which may be doped to achieve a desired resistance value, or by laser irradiation. Due to the high resistance of intrinsic or lightly doped germanium, a resistance change ratio of greater than 10,000:1 is achieved.

摘要翻译： 一种可编程反熔丝元件，其包括锗和铝或铝合金形式的相邻体，当加热到铝和锗的合金化的温度时，形成具有良好机械和热性能的低电阻连接。 用于编程反熔丝元件的加热可以通过锗中的电阻加热来实现，其可以被掺杂以实现期望的电阻值，或通过激光照射。 由于本征或轻掺杂锗的高电阻，实现了大于10,000:1的电阻变化率。

公开(公告)号：US5298784A

公开(公告)日：1994-03-29

申请号：US858835

申请日：1992-03-27

申请人： Jeffrey P. Gambino ,  Dominic J. Schepis ,  Krishna Seshan

发明人： Jeffrey P. Gambino ,  Dominic J. Schepis ,  Krishna Seshan

IPC分类号： H01L21/82 ,  H01L23/525 ,  H01L23/48

CPC分类号： H01L23/5256 ,  H01L23/5252 ,  H01L2924/0002

摘要： An improved antifuse uses metal penetration of either a P-N diode junction or a Schottky diode. The P-N junction, or Schottky diode, is contacted by a diffusion barrier such as TiN, W, Ti-W alloy, or layers of Ti and Cr, with a metal such as Al. Al-CU alloy, Cu, Au, or Ag on top of the diffusion barrier. When this junction is stressed with voltage pulse producing a high current density, severe joule heating occurs resulting in metal penetration of the diffusion barrier and the junction. The voltage drop across the junction decreases by about a factor of ten after the current stress and is stable thereafter. Alternatively, a shallow P-N junction in a silicon substrate is contacted by a layer of metal that forms a silicide, such as Ti, Cr, W, Mo, or Ta. Stressing the junction with a voltage pulse to produce a high current density results in the metal penetrating the junction and reacting with the substrate to form a silicide.

摘要翻译： 改进的反熔丝使用P-N二极管结或肖特基二极管的金属穿透。 P-N结或肖特基二极管通过诸如TiN，W，Ti-W合金或Ti和Cr的层的扩散阻挡层与诸如Al的金属接触。 Al-Cu合金，Cu，Au或Ag在扩散阻挡层的顶部。 当该结被电压脉冲施加而产生高电流密度时，发生严重的焦耳加热，导致扩散阻挡层和结的金属穿透。 跨接点的电压降在电流应力之后减少约十倍，此后稳定。 或者，硅衬底中的浅P-N结与由Ti，Cr，W，Mo或Ta形成硅化物的金属层接触。 用电压脉冲强加结以产生高电流密度导致金属穿透接合部并与衬底反应形成硅化物。

公开(公告)号：US4502913A

公开(公告)日：1985-03-05

申请号：US393932

申请日：1982-06-30

申请人： John S. Lechaton ,  Shashi D. Malaviya ,  Dominic J. Schepis ,  Gurumakonda R. Srinivasan

发明人： John S. Lechaton ,  Shashi D. Malaviya ,  Dominic J. Schepis ,  Gurumakonda R. Srinivasan

IPC分类号： H01L27/00 ,  H01L21/3065 ,  H01L21/316 ,  H01L21/76 ,  H01L21/762 ,  H01L21/763 ,  H01L21/306 ,  B44C1/22 ,  C03C15/00 ,  H01L27/04

CPC分类号： H01L21/3065 ,  H01L21/76232 ,  H01L21/763

摘要： A fully isolated dielectric structure for isolating regions of monocrystalline silicon from one another and method for making such structure are described. The structure uses a combination of recessed oxide isolation with pairs of parallel, anisotropic etched trenches which are subsequently oxidized and filled to give complete dielectric isolation for regions of monocrystalline silicon. The anisotropic etching preferably etches a buried N+ sublayer under the monocrystalline silicon region and then the trench structure is thermally oxidized to consume the remaining N+ layer under the monocrystalline region and to fully isolate the monocrystalline silicon region between pairs of such trenches.

摘要翻译： 描述了用于将单晶硅的区域彼此隔离的完全隔离的电介质结构和用于制造这种结构的方法。 该结构使用凹陷氧化物隔离与成对的各向异性蚀刻沟槽的组合，其随后被氧化和填充，以为单晶硅区域提供完全介电隔离。 各向异性蚀刻优选蚀刻在单晶硅区域下方的掩埋的N +子层，然后将该沟槽结构热氧化以消耗单晶区域下面的剩余N +层，并且在这种沟槽对之间完全隔离单晶硅区域。