公开(公告)号：US20070096293A1

公开(公告)日：2007-05-03

申请号：US11336973

申请日：2006-01-23

申请人： Chau Wen ,  Da-Jung Chen ,  Chun-Liang Lin ,  Chih-Chan Day

发明人： Chau Wen ,  Da-Jung Chen ,  Chun-Liang Lin ,  Chih-Chan Day

IPC分类号： H01L23/12 ,  H01L23/52

CPC分类号： H01L23/3107 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/495 ,  H01L23/552 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： The present invention provides a package device for reducing the electromagnetic/radio frequency interference, which includes a first substrate with a shielding structure on the under surface of the first substrate, and an insulating layer on the shielding structure. The first substrate includes a through hole that is filled with the conductor therein. A plurality of lead-frames located on the bottom surface of the first substrate. A second substrate located above between the two lead-frames. Then, the molding compound encapsulated to cover the above structures to form a package device. Therefore, the shielding path of the package device is constructed of the plurality of lead-frames, the conductor within the first substrate, the shielding structure, and the grounded to discharge the electromagnetic/radio frequency out of the package device, thus, the electromagnetic/radio frequency interference for the package device can be reduced.

摘要翻译： 本发明提供了一种用于减小电磁/射频干扰的封装装置，其包括在第一基板的下表面上具有屏蔽结构的第一基板和屏蔽结构上的绝缘层。 第一基板包括在其中填充有导体的通孔。 位于第一基板的底表面上的多个引线框架。 位于两个引线框之间的第二基板。 然后，封装以覆盖上述结构的模塑料形成包装装置。 因此，封装器件的屏蔽路径由多个引线框架，第一基板内的导体，屏蔽结构构成，并且接地以将电磁/射频放出封装器件，因此，电磁 可以减少封装器件的射频干扰。

公开(公告)号：US06781147B2

公开(公告)日：2004-08-24

申请号：US10340137

申请日：2003-01-10

申请人： Shi-Ming Chen ,  Chun-Liang Lin ,  Wen-Bin Chen ,  Yan-Kuin Su

发明人： Shi-Ming Chen ,  Chun-Liang Lin ,  Wen-Bin Chen ,  Yan-Kuin Su

IPC分类号： H01L2906

CPC分类号： H01L33/20 ,  H01L33/145

摘要： A lateral current blocking light emitting diode (LED) and a method of making the same are disclosed. The present invention features in that a trench is formed between the two electrodes via the technique of such as etching, wherein the depth of the trench reaches to at least the active layer, thereby blocking the lateral current between the two electrodes. With the use of the present invention, the possibility of the current passing through the active layer can be increased, thereby improving the brightness of the LED; and the chance of the photons emitted from the lateral of the trench can be raised wherein the photons are generated from the active layer, thereby increasing the output efficiency of the photons generated from the active layer.

公开(公告)号：US06404938B1

公开(公告)日：2002-06-11

申请号：US09233214

申请日：1999-01-20

申请人： Chun-Tsai Chien ,  Chun-Liang Lin

发明人： Chun-Tsai Chien ,  Chun-Liang Lin

IPC分类号： G06K700

CPC分类号： G06K7/1092 ,  H04N1/0402 ,  H04N2201/0454

摘要： A method and apparatus for speeding up the reading speed of a sequential I/O device, such as a Charge Coupled Device, is disclosed. The method involves in providing normal clocks for reading selected pixels and dummy clocks for reading unselected pixels. Since dummy clocks are faster than normal clocks, therefore the total time for processing the document can be less than using clocks of uniform speed. The apparatus of the invention comprises: a clock control device for generating two transfer pulses &phgr;1 and &phgr;2 in response to a clock cycle. The transfer pulses &phgr;1 and &phgr;2 are input to a sequential I/O device. The signal charge generated from the sequential I/O device will then output to an AND converter to be converted into digital signals. If the digital signals are marked, they will be latched. If not, they will simply be ignored.

摘要翻译： 公开了一种用于加速诸如电荷耦合装置的顺序I / O装置的读取速度的方法和装置。 该方法涉及提供用于读取所选像素的正常时钟和用于读取未选择像素的虚拟时钟。 由于虚拟时钟比正常时钟快，因此处理文档的总时间可能小于使用均匀速度的时钟。 本发明的装置包括：时钟控制装置，用于响应于时钟周期产生两个传送脉冲phi1和phi2。 传送脉冲phi1和phi2被输入到顺序I / O设备。 然后，从顺序I / O设备产生的信号电荷将输出到一个AND转换器，以转换成数字信号。 如果数字信号被标记，它们将被锁定。 如果没有，他们将被忽略。