Exposure method using complementary divided mask, exposure apparatus, semiconductor device, and method of producing the same
    91.
    发明申请
    Exposure method using complementary divided mask, exposure apparatus, semiconductor device, and method of producing the same 失效
    使用互补分割掩模的曝光方法,曝光装置,半导体装置及其制造方法

    公开(公告)号:US20070111116A1

    公开(公告)日:2007-05-17

    申请号:US11650271

    申请日:2007-01-05

    摘要: To provide an exposure method and an exposure apparatus, using a complementary divided mask, designed to enable alignment of a complementary divided mask at a high precision over the entire region of a semiconductor wafer. Further, to provide a semiconductor device fabricated by the exposure method and a method of producing a semiconductor device using the exposure method. In a first region at a middle portion of a semiconductor wafer, the complementary divided mask is aligned by die-by-die alignment method based on detection results of positions of alignment marks provided at the respective chips and the regions are exposed, while in a second region, outside of the first region, where alignment on the complementary divided mask by die-by-die alignment method cannot be used, coordinates of the respective chip in the second region are decided by global alignment method based on detection results of positions of alignment marks detected in the first step and the complementary divided mask is aligned and the regions are exposed.

    摘要翻译: 为了提供曝光方法和曝光装置,使用互补分割掩模,其设计成能够在半导体晶片的整个区域上以高精度对准互补分割掩模。 此外,提供通过曝光方法制造的半导体器件和使用该曝光方法制造半导体器件的方法。 在半导体晶片的中间部分的第一区域中,基于设置在各个芯片处的对准标记的位置的检测结果,通过逐个芯片对准方法对互补分割掩模进行排列,并且在 第二区域,在第一区域的外侧,通过逐个芯片对准方法对互补分割掩模进行对准不能使用,第二区域中的各个芯片的坐标基于全局对准方法,基于 在第一步骤中检测到的对准标记和互补分割掩模对准并且区域被曝光。

    Method and apparatus for detecting defects
    93.
    发明申请
    Method and apparatus for detecting defects 失效
    检测缺陷的方法和装置

    公开(公告)号:US20060068512A1

    公开(公告)日:2006-03-30

    申请号:US11206209

    申请日:2005-08-18

    IPC分类号: H01L21/66 G01R31/26

    摘要: An inspection apparatus projects a laser beam on the surface of a SOI wafer and detects foreign matter on and defects in the surface of the SOI wafer by receiving scattered light reflected from the surface of the SOI wafer. The wavelength of the laser beam used by the inspection apparatus is determined so that a penetration depth of the laser beam in a Si thin film may be 10 nm or below to detect only foreign matter on and defects in the outermost surface and not to detect foreign matter and defects in a BOX layer. Only the foreign matter on and defects in the outermost surface layer can be detected without being influenced by thin-film interference by projecting the laser beam on the surface of the SOI wafer and receiving scattered light rays.

    摘要翻译: 检查装置将激光束投射在SOI晶片的表面上,通过接收从SOI晶片的表面反射的散射光来检测SOI晶片的异物和表面的缺陷。 确定检查装置使用的激光束的波长,使得Si薄膜中的激光束的穿透深度可以为10nm以下,仅检测异物和最外表面的缺陷,并且不检测外部 BOX层的物质和缺陷。 只有通过将激光束投射在SOI晶片的表面上并且接收散射光线,才能够检测出最外层的异物和缺陷,而不受薄膜干涉的影响。

    Method and apparatus for detecting defects
    94.
    发明申请
    Method and apparatus for detecting defects 审中-公开
    检测缺陷的方法和装置

    公开(公告)号:US20050264797A1

    公开(公告)日:2005-12-01

    申请号:US11136664

    申请日:2005-05-25

    摘要: The present invention relates to a defect detection apparatus and method by which foreign particles and circuit pattern defects can be detected in distinction from the edge roughness of wiring on the substrate. The defect detection apparatus comprises an irradiation optical system includes: a beam expander; an optical member group formed by stacking multiple plate-like optical members each having a different optical path length at least in a beam-converging direction in order to admit the laser beam with the beam diameter extended by the beam expander and emit multiple slit-like beams each spatially reduced in coherence in the beam-converging direction; and beam-converging optical system by which the multiple slit-like beams each emitted from the optical member group is converged into a slit-like beam in the beam-converging direction and the slit-like beam is irradiated from an oblique direction onto the surface of the subject.

    摘要翻译: 本发明涉及一种缺陷检测装置和方法,通过该缺陷检测装置和方法可以检测与基板上的布线的边缘粗糙度相关的异物和电路图案缺陷。 缺陷检测装置包括:照射光学系统,包括:扩束器; 光学构件组,其通过至少在束会聚方向上堆叠具有不同光程长度的多个板状光学构件而形成,以便允许具有由扩束器延伸的光束直径的激光束并且发射多个狭缝状 光束在束收敛方向上的相干性在空间上减小; 以及束光聚光光学系统,其中从光学构件组发射的多个狭缝状光束在束会聚方向上会聚到狭缝状光束中,并且狭缝状光束从倾斜方向照射到表面上 的主题。

    Method of apparatus for detecting particles on a specimen
    95.
    发明申请
    Method of apparatus for detecting particles on a specimen 失效
    用于检测样品上的颗粒的装置的方法

    公开(公告)号:US20050213086A1

    公开(公告)日:2005-09-29

    申请号:US11086442

    申请日:2005-03-23

    CPC分类号: G01N21/956

    摘要: An apparatus for inspecting a pattern to detect a small pattern defect has an illuminating light source, as illuminating optical system having a plurality of illuminating portions for switching an optical path of illuminating light flux to a surface of board constituting the inspected object from a plurality of directions different from each other, a detecting optical system having a variable magnification using an object lens for condensing reflected diffracted light from the illuminated board, a focusing optical system having a variable magnification capable of focusing an optical image by converged reflected diffracted light with a desired focusing magnification and an optical detector for detecting the optical image focused by the focusing optical system to convert it into an image signal, an A/D converter for converting the image signal into a digital image signal, and an image signal processor for processing the digital image signal to detect the defect.

    摘要翻译: 用于检查图案以检测小图案缺陷的装置具有照明光源,作为具有多个照明部的照明光学系统,所述照明光学系统具有多个照明部分,用于将照明光束的光路从多个照明部分切换到构成被检查物体的板的表面 方向不同的检测光学系统,使用用于聚焦来自照明板的反射衍射光的物镜具有可变放大倍数的检测光学系统,具有可变倍率的聚焦光学系统,其能够通过会聚的反射衍射光聚焦光学图像,具有期望的 聚焦放大率和用于检测由聚焦光学系统聚焦的光学图像以将其转换成图像信号的光学检测器,用于将图像信号转换为数字图像信号的A / D转换器和用于处理数字图像信号的图像信号处理器 图像信号来检测缺陷。

    High-frequency switch, and electronic device using the same
    97.
    发明授权
    High-frequency switch, and electronic device using the same 有权
    高频开关,电子设备使用相同

    公开(公告)号:US06876280B2

    公开(公告)日:2005-04-05

    申请号:US10601799

    申请日:2003-06-23

    申请人: Hiroyuki Nakano

    发明人: Hiroyuki Nakano

    IPC分类号: H01L27/095 H01P1/15 H01P1/10

    CPC分类号: H01P1/15

    摘要: A high-frequency switch comprises: a substrate; a main line electrode provided between two terminals; a stub line electrode with one end thereof connected to the side edge of the main line electrode and the other end thereof grounded; and a ground electrode provided adjacent to the stub line electrode in the width direction thereof; wherein the substrate has a semiconductor activation layer which extends to below the stub line electrode and the ground electrode between at least one side edge of the stub line electrode and the ground electrode; and wherein a gate electrode which extends in the longitudinal direction of the stub line electrode is provided on the semiconductor activation layer between the stub line electrode and the ground electrode, thereby forming an FET structure, thus providing a high-frequency switch and electronic device therewith, capable of using high frequencies, having reduced insertion loss, and high signal cut-off capabilities.

    摘要翻译: 高频开关包括:基板; 主线电极设置在两个端子之间; 短线电极,其一端连接到主线电极的侧边缘,另一端接地; 以及接地电极,其在所述短线电极的宽度方向上邻近设置; 其中,所述基板具有在所述短截线电极的至少一个侧边缘与所述接地电极之间延伸到所述短线电极和所述接地电极的下方的半导体激活层; 并且其中在短截线电极和接地电极之间的半导体激活层上设置沿着短截线电极的纵向方向延伸的栅电极,从而形成FET结构,从而提供高频开关和电子器件 能够使用高频,具有降低的插入损耗和高信号截止能力。

    High frequency switch and electronic device including the same
    98.
    发明申请
    High frequency switch and electronic device including the same 有权
    高频开关和电子设备包括相同

    公开(公告)号:US20050017820A1

    公开(公告)日:2005-01-27

    申请号:US10897203

    申请日:2004-07-23

    申请人: Hiroyuki Nakano

    发明人: Hiroyuki Nakano

    CPC分类号: H01P1/15

    摘要: A high frequency switch includes a main line electrode arranged on a substrate so as to extend between two terminals, a short stub line electrode on the substrate of which one end is connected to a one-side edge of the main line electrode, and the other end is grounded, an open stub line electrode on the substrate of which one end is connected to the other-side edge of the main line which is opposed to the one-side edge, and the other terminal is opened, ground electrodes arranged on the substrate adjacent to the short stub line electrode and the open stub line electrode in the width direction thereof, a semiconductor activation layer disposed in a portion of the substrate between the side edge at least on the one-end side of the open stub line electrode and the ground electrode so as to extend under the open stub line electrode and under the ground electrode, and a gate electrode disposed on the semiconductor activation layer between the open stub line electrode and the ground electrode so as to extend along the longitudinal direction of the open stub line electrode, whereby an FET structure is provided.

    摘要翻译: 高频开关包括布置在基板上以在两个端子之间延伸的主线电极,其一端连接到主线电极的一侧边缘的基板上的短短线电极,另一端 端部接地,基板上的开放短截线电极,其一端连接到与一侧边缘相对的主线的另一侧边缘,另一端开放,布置在其上的接地电极 基板,其与所述短短线电极和所述开放短截线电极的宽度方向相邻;半导体激活层,其设置在所述基板的至少在所述开路短线电极的一端侧的所述侧边缘的所述一部分中, 所述接地电极在所述开放短截线电极下方和所述接地电极下方延伸,以及设置在所述半导体活性层上的所述开路短路电极与所述地电 de,以沿着开放短截线电极的纵向方向延伸,从而提供FET结构。

    Electrode forming method and field effect transistor
    99.
    发明授权
    Electrode forming method and field effect transistor 有权
    电极形成方法和场效应晶体管

    公开(公告)号:US06835635B2

    公开(公告)日:2004-12-28

    申请号:US10316210

    申请日:2002-12-10

    IPC分类号: H01L2128

    摘要: A gate electrode is formed in the following manner. A first resist layer having a first opening is formed on a semiconductor substrate. A second resist layer having a second opening larger than the first opening is formed on the first resist layer. A first conductor layer containing a high-melting-point metal is formed. Subsequently, a second conductor layer containing low-resistance metal is formed, and then the first conductor layer within the second opening is removed by etching. Next, the second resist layer is removed by a lift-off process, and finally the first resist layer is removed by ashing.

    摘要翻译: 以下列方式形成栅电极。 在半导体衬底上形成具有第一开口的第一抗蚀剂层。 在第一抗蚀剂层上形成具有大于第一开口的第二开口的第二抗蚀剂层。 形成含有高熔点金属的第一导体层。 随后,形成含有低电阻金属的第二导体层,然后通过蚀刻去除第二开口内的第一导体层。 接下来,通过剥离处理去除第二抗蚀剂层,最后通过灰化除去第一抗蚀剂层。