Lighting device and lighting system
    91.
    发明申请
    Lighting device and lighting system 失效
    照明设备和照明系统

    公开(公告)号:US20050168162A1

    公开(公告)日:2005-08-04

    申请号:US11046880

    申请日:2005-02-01

    申请人: Takao Inoue

    发明人: Takao Inoue

    IPC分类号: H05B37/02 H01L33/00 H05B33/08

    CPC分类号: H05B33/0821 H05B33/089

    摘要: First resistors (R1, R2) for setting a forward current value are connected in series to light-emitting diodes (LED 1, LED 2) respectively to constitute first serial circuits (112, 113), which are connected to an input terminal (111). Second serial circuits (115, 116) are connected in parallel to the first serial circuits (112, 113) respectively. The second serial circuits (115, 116) are constituted by a combination of a Zener diode (ZD1) and a second resistor (R3), and another combination of a Zener diode (ZD2) and a second resistor (R4). When a higher voltage than rated voltages of the light-emitting diodes (LED 1, LED 2) is applied, the Zener diodes (ZD1, ZD2) shunt current into the second serial circuit (115, 116) to allow the light-emitting diodes (LED 1, LED 2) to light up at desirable luminance levels different from each other. When a supplied power voltage decreases, current is not shunted, so that the same forward current flows through the light-emitting diodes (LED 1, LED 2), allowing the light-emitting diodes (LED 1, LED 2) to go off at the same timing.

    摘要翻译: 用于设定正向电流值的第一电阻器(R 1,R 2)分别与发光二极管(LED 1,LED 2)串联连接以构成第一串联电路(112,113),其连接到输入端子 (111)。 第二串行电路(115,116)分别与第一串行电路(112,113)并联连接。 第二串联电路(115,116)由齐纳二极管(ZD 1)和第二电阻器(R 3)的组合构成,齐纳二极管(ZD 2)和第二电阻器(R 4)的组合, 。 当施加比发光二极管(LED 1,LED 2)的额定电压高的电压时,齐纳二极管(ZD 1,ZD 2)将电流分流到第二串联电路(115,116)中, 发光二极管(LED 1,LED 2)以相互不同的期望亮度水平亮起。 当供电电压降低时,电流不会分流,因此相同的正向电流流过发光二极管(LED 1,LED 2),允许发光二极管(LED 1,LED 2)在 相同的时机。

    CRC encoding circuit, CRC encoding method, data sending device and data receiving device
    92.
    发明授权
    CRC encoding circuit, CRC encoding method, data sending device and data receiving device 失效
    CRC编码电路,CRC编码方式,数据发送装置和数据接收装置

    公开(公告)号:US06910172B2

    公开(公告)日:2005-06-21

    申请号:US09987717

    申请日:2001-11-15

    IPC分类号: H03M9/00 H03M13/09 H03M13/00

    CPC分类号: H03M13/091

    摘要: A CRC encoding circuit for generating a CRC code in accordance with a parallel data having a remainder portion data in a last data set of the parallel data, comprises: a first encoding unit for generating one or more first CRC codes in parallel in accordance with the remainder portion data; a CRC code selecting unit for selecting a second CRC code having predetermined number of bytes, from the first CRC codes generated by the first encoding unit; a converting unit for converting the remainder portion data into a serial data; and a second encoding unit for generating a third CRC code in accordance with the second CRC code selected by the CRC code selecting unit and the serial data converted by the converting unit.

    摘要翻译: 一种用于根据具有并行数据的最后数据组中的余数部分数据的并行数据产生CRC码的CRC编码电路,包括:第一编码单元,用于根据所述并行数据并行生成一个或多个第一CRC码 余数部分数据; CRC码选择单元,用于从由第一编码单元生成的第一CRC码中选择具有预定字节数的第二CRC码; 转换单元,用于将剩余部分数据转换为串行数据; 以及第二编码单元,用于根据由CRC码选择单元选择的第二CRC码和由转换单元转换的串行数据产生第三CRC码。

    Image signal processing apparatus and digital signal processing method
    97.
    发明授权
    Image signal processing apparatus and digital signal processing method 失效
    图像信号处理装置和数字信号处理方法

    公开(公告)号:US06714252B2

    公开(公告)日:2004-03-30

    申请号:US09863497

    申请日:2001-05-23

    IPC分类号: H04N701

    CPC分类号: H04N7/0125

    摘要: In each conversion blocks 10, 20 and 30, pixels adjacent to a subject pixel data are selected in the class tap construction section from SD signals, the detection of level distribution pattern of the pixel data is performed in the class categorization section and a class is determined based on the detected pattern. The pixel data of the subject pixel is generated by reading the prediction coefficient corresponding to classes from the prediction coefficient memory and performing prediction operation in the sum of products operation section using pixel data of the selected pixel selected by the prediction tap construction section and the prediction tap selection section and the read prediction coefficient. According to the selection of the switching sections 41 and 42, a HD signal having a high resolution is obtained and a signal whose tone level of a SD signal is corrected is obtained.

    摘要翻译: 在每个转换块10,20和30中,在类别抽头构建部分中从SD信号中选择与主题像素数据相邻的像素,在类分类部分中执行像素数据的级别分布模式的检测,并且类是 基于检测到的图案确定。 通过从预测系数存储器读取与等级对应的预测系数,并使用由预测抽头构造部选择的所选择的像素的像素数据和预测图像的预测值,在乘积运算部的和中进行预测运算,生成被摄体像素的像素数据 抽头选择部分和读取预测系数。 根据切换部分41和42的选择,获得具有高分辨率的HD信号,并且获得校正了SD信号的音调电平的信号。

    Digital signal processing apparatus and method for controlling the same
    98.
    发明授权
    Digital signal processing apparatus and method for controlling the same 失效
    数字信号处理装置及其控制方法

    公开(公告)号:US06704853B1

    公开(公告)日:2004-03-09

    申请号:US09806310

    申请日:2001-03-29

    IPC分类号: G06F938

    摘要: The present invention provides a digital signal processing apparatus and a method for controlling the apparatus that allow for a reduction of circuit size to minimize an increase in power consumption and the costs of circuitry and an improvement in signal processing speed. To achieve this, the present invention eliminates a circuit arrangement that was conventionally required for executing a compare instruction, conditional jump instruction, and jump instruction, by adding a relatively small-sized circuit such as an encoder 51 for processing an external signal 10 and a capability of decoding a condition determination data select instruction.

    摘要翻译: 本发明提供了一种数字信号处理装置和一种用于控制该装置的方法,该装置允许减小电路尺寸以最小化电力消耗的增加和电路的成本以及信号处理速度的提高。 为了实现这一点,本发明通过添加诸如用于处理外部信号10的编码器51的相对较小尺寸的电路来消除通常需要执行比较指令,条件跳转指令和跳转指令的电路装置,以及 解码条件确定数据选择指令的能力。

    Integrated circuit internal signal monitoring apparatus
    99.
    发明授权
    Integrated circuit internal signal monitoring apparatus 失效
    集成电路内部信号监控装置

    公开(公告)号:US06687863B1

    公开(公告)日:2004-02-03

    申请号:US09674018

    申请日:2001-07-11

    申请人: Takao Inoue

    发明人: Takao Inoue

    IPC分类号: G11C2900

    摘要: An integrated circuit internal signal monitoring apparatus comprises an integrated circuit. The integrated circuit comprises a signal change information generating section for detecting changes in a plurality of internal signals to be monitored in a circuit block, and in response to a level of at least one of the plurality of internal signals changing sequentially generating flags indicating the internal signal whose level has been changed, the post-change level, and that the levels of other internal signals have not been changed; a storage section for sequentially storing the flags and a trigger generating section for generating a write stop trigger signal for stopping a write operation of the flags to the storage section The integrated circuit internal signal monitoring apparatus further comprises an internal signal waveform reproduction section for reading the flags from the storage section after the generation of the write stop trigger signal.

    摘要翻译: 集成电路内部信号监视装置包括集成电路。 集成电路包括信号改变信息产生部分,用于检测电路块中待监视的多个内部信号的变化,并且响应于多个内部信号中的至少一个的电平顺序地产生指示内部的标志 电平变化的信号,变化后的电平,其他内部信号的电平没有变化; 用于顺序地存储标志的存储部分和用于产生用于停止对存储部分的标志的写入操作的写入停止触发信号的触发产生部分。集成电路内部信号监视装置还包括内部信号波形再现部分,用于读取 来自存储部分的标志在产生写停止触发信号后。

    Method and apparatus for echo cancellation updates in a multicarrier transceiver system
    100.
    发明授权
    Method and apparatus for echo cancellation updates in a multicarrier transceiver system 有权
    用于多载波收发器系统中的回波消除更新的方法和装置

    公开(公告)号:US06683859B1

    公开(公告)日:2004-01-27

    申请号:US09438619

    申请日:1999-11-12

    IPC分类号: H04B320

    摘要: An echo canceler (34) includes a summing device (104) that subtracts a correction signal from a received signal, the difference of which represents the far-end signal with an error component. Instead of adapting its coefficients using the output of the summing device (104), the echo canceler (34) uses the difference between the input and output of a decision device (108) as an estimate of the error component alone. The estimate of the error component is then used to adapt the coefficients according to the adaptive least mean squares (LMS) algorithm. In one embodiment, the decision device (108) forms discrete multi-tone symbols based on the equalized output of the summing device. In this embodiment, the echo canceler (34) performs an inverse of the equalization step efficiently by replacing a division operation with a multiply operation and a corresponding power-of-two shift operation.

    摘要翻译: 回波消除器(34)包括从接收信号中减去校正信号的求和装置(104),该差值表示具有误差分量的远端信号。 代替使用求和装置(104)的输出来适配其系数,回波消除器(34)使用决策装置(108)的输入和输出之间的差作为单独的误差分量的估计。 然后使用误差分量的估计来根据自适应最小均方(LMS)算法来适应系数。 在一个实施例中,判决设备(108)基于求和设备的均衡输出来形成离散多音调符号。 在本实施例中,回波消除器(34)通过用乘法运算和相应的二次幂移位运算来代替除法运算来有效地执行均衡步骤的逆。