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    HEAT SPREADING LAYER INTEGRATED WITHIN A COMPOSITE IC DIE STRUCTURE AND METHODS OF FORMING THE SAME
    91.
    发明申请
    HEAT SPREADING LAYER INTEGRATED WITHIN A COMPOSITE IC DIE STRUCTURE AND METHODS OF FORMING THE SAME 有权

    公开(公告)号：US20210202347A1

    公开(公告)日：2021-07-01

    申请号：US16727703

    申请日：2019-12-26

    Applicant: Intel Corporation

    Inventor： Shawna Liff ,  Adel Elsherbini ,  Johanna Swan ,  Jimin Yao ,  Veronica Strong

    IPC: H01L23/373 ,  H01L23/48 ,  H01L25/065 ,  H01L21/768

    Abstract: A heat spreading material is integrated into a composite die structure including a first IC die having a first dielectric material and a first electrical interconnect structure, and a second IC die having a second dielectric material and a second electrical interconnect structure. The composite die structure may include a composite electrical interconnect structure comprising the first interconnect structure in direct contact with the second interconnect structure at a bond interface. The heat spreading material may be within at least a portion of a dielectric area through which the bond interface extends. The heat spreading material may be located within one or more dielectric materials surrounding the composite interconnect structure, and direct a flow of heat generated by one or more of the first and second IC dies.

    MIXED HYBRID BONDING STRUCTURES AND METHODS OF FORMING THE SAME
    92.
    发明申请
    MIXED HYBRID BONDING STRUCTURES AND METHODS OF FORMING THE SAME 有权

    公开(公告)号：US20210098411A1

    公开(公告)日：2021-04-01

    申请号：US16584522

    申请日：2019-09-26

    Applicant: Intel Corporation

    Inventor： Shawna Liff ,  Adel Elsherbini ,  Johanna Swan ,  Nagatoshi Tsunoda ,  Jimin Yao

    IPC: H01L23/00 ,  H01L23/498 ,  H01L21/48

    Abstract: Embodiments include a mixed hybrid bonding structure comprising a composite dielectric layer, where the composite dielectric layer comprises an organic dielectric material having a plurality of inorganic filler material. One or more conductive substrate interconnect structures are within the composite dielectric layer. A die is on the composite dielectric layer, the die having one or more conductive die interconnect structures within a die dielectric material. The one or more conductive die interconnect structures are directly bonded to the one or more conductive substrate interconnect structures, and the inorganic filler material of the composite dielectric layer is bonded to the die dielectric material.

    THERMAL MANAGEMENT SOLUTIONS THAT REDUCE INDUCTIVE COUPLING BETWEEN STACKED INTEGRATED CIRCUIT DEVICES
    93.
    发明申请
    THERMAL MANAGEMENT SOLUTIONS THAT REDUCE INDUCTIVE COUPLING BETWEEN STACKED INTEGRATED CIRCUIT DEVICES 审中-公开

    公开(公告)号：US20200027811A1

    公开(公告)日：2020-01-23

    申请号：US16040746

    申请日：2018-07-20

    Applicant: Intel Corporation

    Inventor： Feras Eid ,  Adel Elsherbini ,  Johanna Swan

    IPC: H01L23/367 ,  H01L25/065 ,  H01L23/498

    Abstract: An integrated circuit assembly may be formed having a substrate, a first integrated circuit device electrically attached to the substrate, a second integrated circuit device electrically attached to the first integrated circuit device, and a heat dissipation device comprising at least one first thermally conductive structure proximate at least one of the first integrated circuit device, the second integrated circuit device, and the substrate; and a second thermally conductive structure disposed over the first thermally conductive structure(s), the first integrated circuit device, and the second integrated circuit device, wherein the first thermally conductive structure(s) have a lower electrical conductivity than an electrical conductivity of the second thermally conductive structure. The first thermally conductive structure(s) may be formed by an additive process or may be pre-formed and attached to at least one of the first integrated circuit device, the second integrated circuit device, and the substrate.

    THERMAL MANAGEMENT SOLUTIONS FOR STACKED INTEGRATED CIRCUIT DEVICES USING JUMPING DROPS VAPOR CHAMBERS
    94.
    发明申请
    THERMAL MANAGEMENT SOLUTIONS FOR STACKED INTEGRATED CIRCUIT DEVICES USING JUMPING DROPS VAPOR CHAMBERS 审中-公开

    公开(公告)号：US20190393131A1

    公开(公告)日：2019-12-26

    申请号：US16014312

    申请日：2018-06-21

    Applicant: Intel Corporation

    Inventor： Feras Eid ,  Adel Elsherbini ,  Johanna Swan

    IPC: H01L23/473 ,  H01L25/065 ,  H01L23/367

    Abstract: An integrated circuit structure may be formed having a first integrated circuit device, a second integrated circuit device electrically coupled to the first integrated circuit device with a plurality of device-to-device interconnects, and at least one jumping drops vapor chamber between the first integrated circuit device and the second integrated circuit device wherein at least one device-to-device interconnect of the plurality of device-to-device interconnects extends through the jumping drops vapor chamber. In one embodiment, the integrated circuit structure may include three or more integrated circuit devices with at least two jumping drops vapor chambers disposed between the three or more integrated circuit devices. In a further embodiment, the two jumping drops chambers may be in fluid communication with one another.

    THERMAL MANAGEMENT SOLUTIONS FOR STACKED INTEGRATED CIRCUIT DEVICES
    95.
    发明申请
    THERMAL MANAGEMENT SOLUTIONS FOR STACKED INTEGRATED CIRCUIT DEVICES 审中-公开

    公开(公告)号：US20190385932A1

    公开(公告)日：2019-12-19

    申请号：US16007260

    申请日：2018-06-13

    Applicant: Intel Corporation

    Inventor： Feras Eid ,  Adel Elsherbini ,  Johanna Swan

    IPC: H01L23/473 ,  H01L25/065 ,  H01L23/467 ,  H01L23/367 ,  H01L23/498 ,  H01L23/31

    Abstract: An integrated circuit assembly may be formed having a substrate, a first integrated circuit device electrically attached to the substrate, a second integrated circuit device electrically attached to the first integrated circuit device, and a heat dissipation device defining a fluid chamber, wherein at least a portion of the first integrated circuit device and at least a portion of the second integrated circuit device are exposed to the fluid chamber. In further embodiments, at least one channel may be formed in an underfill material between the first integrated circuit device and the second integrated circuit device, between the first integrated circuit device and the substrate, and/or between the second integrated circuit device and the substrate, wherein the at least one channel is open to the fluid chamber.

    HEAT DISSIPATION DEVICE HAVING ANISOTROPIC THERMALLY CONDUCTIVE SECTIONS AND ISOTROPIC THERMALLY CONDUCTIVE SECTIONS
    97.
    发明申请
    HEAT DISSIPATION DEVICE HAVING ANISOTROPIC THERMALLY CONDUCTIVE SECTIONS AND ISOTROPIC THERMALLY CONDUCTIVE SECTIONS 审中-公开

    公开(公告)号：US20190323785A1

    公开(公告)日：2019-10-24

    申请号：US15957431

    申请日：2018-04-19

    Applicant: Intel Corporation

    Inventor： Feras Eid ,  Adel Elsherbini ,  Johanna Swan

    IPC: F28F3/02 ,  F28F13/00 ,  H01L23/367 ,  H01L23/373

    Abstract: A heat dissipation device may be formed having at least one isotropic thermally conductive section (uniformly high thermal conductivity in all directions) and at least one anisotropic thermally conductive section (high thermal conductivity in at least one direction and low thermal conductivity in at least one other direction). The heat dissipation device may be thermally coupled to a plurality of integrated circuit devices such that at least a portion of the isotropic thermally conductive section(s) and/or the anisotropic thermally conductive section(s) is positioned over at least one integrated circuit device. The isotropic thermally conductive section(s) allows heat spreading/removal from hotspots or areas with high-power density and the anisotropic thermally conductive section(s) transfers heat away from the at least one integrated circuit device predominately in a single direction with minimum conduction resistance in areas with uniform power density distribution, while reducing heat transfer in the other directions, thereby reducing thermal cross-talk.

    FLEXIBLE ELECTRONIC SYSTEM WITH WIRE BONDS
    99.
    发明申请
    FLEXIBLE ELECTRONIC SYSTEM WITH WIRE BONDS 审中-公开

    公开(公告)号：US20170179103A1

    公开(公告)日：2017-06-22

    申请号：US15450900

    申请日：2017-03-06

    Applicant: Intel Corporation

    Inventor： Aleksandar Aleksov ,  Mauro Kobrinsky ,  Johanna Swan ,  Rajendra C. Dias

    IPC: H01L25/00 ,  H01L23/00

    Abstract: Generally discussed herein are systems and apparatuses that can include apparatuses, systems, or method for a flexible, wire bonded device. According to an example an apparatus can include (1) a first rigid circuit comprising a first plurality of bond pads proximate to a first edge of the first rigid circuit, (2) a second rigid circuit comprising a second plurality of bond pads proximate to a first edge of the second rigid circuit, the second rigid circuit adjacent the first rigid circuit and the first edge of the second rigid circuit facing the first edge of the first rigid circuit, or (3) a first plurality of wire bonded wires, each wire bonded wire of the first plurality of wire bonded wires electrically and mechanically connected to a bond pad of the first plurality of bond pads and a bond pad of the second plurality of bond pads.

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