Single-chip bridge-type magnetic field sensor and preparation method thereof
    91.
    发明授权
    Single-chip bridge-type magnetic field sensor and preparation method thereof 有权
    单片桥式磁场传感器及其制备方法

    公开(公告)号:US09123877B2

    公开(公告)日:2015-09-01

    申请号:US14009834

    申请日:2012-04-01

    摘要: The present invention discloses a design and manufacturing method for a single-chip magnetic sensor bridge. The sensor bridge comprises four magnetoresistive elements. The magnetization of the pinned layer of each of the four magnetoresistive elements is set in the same direction, but the magnetization directions of the free layers of the magnetoresistive elements on adjacent arms of the bridge are set at different angles with respect to the pinned layer magnetization direction. The absolute values of the angles of the magnetization directions of the free layers of all four magnetoresistive elements are the same with respect with their pinning layers. The disclosed magnetic biasing scheme enables the integration of a push-pull Wheatstone bridge magnetic field sensor on a single chip with better performance, lower cost, and easier manufacturability than conventional magnetoresistive sensor designs.

    摘要翻译: 本发明公开了一种单芯片磁传感器桥的设计和制造方法。 传感器桥包括四个磁阻元件。 四个磁阻元件中的每一个的钉扎层的磁化被设定在相同的方向上,但是桥的相邻臂上的磁阻元件的自由层的磁化方向相对于被钉扎层的磁化被设定在不同的角度 方向。 所有四个磁阻元件的自由层的磁化方向的角度的绝对值与它们的钉扎层相同。 所公开的磁偏置方案使得能够将单个芯片上的推挽惠斯通电桥磁场传感器与传统的磁阻传感器设计相比具有更好的性能,更低的成本和更易于制造的能力。

    Single-Package Bridge-Type Magnetic Field Sensor
    94.
    发明申请
    Single-Package Bridge-Type Magnetic Field Sensor 有权
    单包桥型磁场传感器

    公开(公告)号:US20130300409A1

    公开(公告)日:2013-11-14

    申请号:US13979721

    申请日:2011-12-31

    IPC分类号: G01R33/09

    CPC分类号: G01R33/093 G01R33/098

    摘要: A magnetoresistive sensor bridge utilizing magnetic tunnel junctions is disclosed. The magnetoresistive sensor bridge is composed of one or more magnetic tunnel junction sensor chips to provide a half-bridge or full bridge sensor in a standard semiconductor package. The sensor chips may be arranged such that the pinned layers of the different chips are mutually anti-parallel to each other in order to form a push-pull bridge structure. The sensor chips are then interconnected using wire bonding. The chips can be wire-bonded to various standard semiconductor leadframes and packaged in inexpensive standard semiconductor packages. The bridge design may be push-pull or referenced. In the referenced case, the on-chip reference resistors may be implemented without magnetic shielding.

    摘要翻译: 公开了一种利用磁隧道结的磁阻传感器桥。 磁阻传感器桥由一个或多个磁性隧道结传感器芯片组成,以在标准半导体封装中提供半桥或全桥传感器。 可以将传感器芯片布置成使得不同芯片的被钉扎层彼此相互反平行以形成推挽桥结构。 然后使用引线接合将传感器芯片互连。 这些芯片可以引线接合到各种标准的半导体引线框架上,并以廉价的标准半导体封装封装。 桥梁设计可能是推拉式或参考式。 在所提及的情况下,片上参考电阻器可以在没有磁屏蔽的情况下实现。

    Hierarchical cross-point array of non-volatile memory
    95.
    发明授权
    Hierarchical cross-point array of non-volatile memory 有权
    非易失性存储器的分层交叉点阵列

    公开(公告)号:US08363450B2

    公开(公告)日:2013-01-29

    申请号:US13280109

    申请日:2011-10-24

    IPC分类号: G11C11/00

    CPC分类号: A01H6/14 A01H5/02

    摘要: A method and apparatus for reading data from a non-volatile memory cell. In some embodiments, a cross-point array of non-volatile memory cells is arranged into rows and columns. A selection circuit is provided that is capable of activating the first block of memory cells while deactivating the second block of memory cells. Further, a read circuit is provided that is capable of reading a logical state of a predetermined memory cell in the first block of memory cells with a reduced leak current by programming a first resistive state to the block selection elements corresponding to the first block of memory cells while programming a second resistive state to the block selection elements corresponding to the second block of memory cells.

    摘要翻译: 一种用于从非易失性存储单元读取数据的方法和装置。 在一些实施例中,非易失性存储器单元的交叉点阵列被布置成行和列。 提供了选择电路,其能够在禁用第二存储单元块的同时激活存储器单元的第一块。 此外,提供一种读取电路,其能够通过对与第一存储器块相对应的块选择元件编程第一电阻状态,以减小的漏电流来读取存储器单元的第一块中的预定存储器单元的逻辑状态 同时将第二电阻状态编程到对应于存储器单元的第二块的块选择元件。

    MULTI-ANGLE HARD BIAS DEPOSITION FOR OPTIMAL HARD-BIAS DEPOSITION IN A MAGNETIC SENSOR
    98.
    发明申请
    MULTI-ANGLE HARD BIAS DEPOSITION FOR OPTIMAL HARD-BIAS DEPOSITION IN A MAGNETIC SENSOR 审中-公开
    用于磁传感器中最佳硬度偏移的多角度硬偏置沉积

    公开(公告)号:US20120156390A1

    公开(公告)日:2012-06-21

    申请号:US12975084

    申请日:2010-12-21

    IPC分类号: B05D3/06 B05D3/10 B05D5/00

    摘要: A method for manufacturing a magnetic sensor that result in improved magnetic bias field to the sensor, improved shield to hard bias spacing and a flatter top shield profile. The method includes a multi-angled deposition of the hard bias structure. After forming the sensor stack a first hard bias layer is deposited at an angle of about 70 degrees relative to horizontal. This is a conformal deposition. Then, a second deposition is performed at an angle of about 90 degrees relative to horizontal. This is a notching deposition, that results in notches being formed adjacent to the sensor stack. Then, a hard bias capping layer is deposited at an angle of about 55 degrees relative to horizontal. This is a leveling deposition that further flattens the surface on which the top shield can be electroplated.

    摘要翻译: 一种用于制造磁传感器的方法,其导致对传感器的改善的磁偏置场,改善了对硬偏置间隔的屏蔽和较平坦的顶部屏蔽轮廓。 该方法包括硬偏置结构的多角度沉积。 在形成传感器堆叠之后,第一硬偏压层以相对于水平面约70度的角度沉积。 这是一个保形沉积。 然后,以相对于水平方向大约90度的角度执行第二沉积。 这是一种凹陷沉积,导致在传感器堆叠附近形成凹口。 然后,相对于水平度以大约55度的角度沉积硬偏压盖层。 这是一种平整沉积物,其进一步平坦化可以电镀顶部屏蔽的表面。