公开(公告)号：US07936021B2

公开(公告)日：2011-05-03

申请号：US11976252

申请日：2007-10-23

申请人： Chang-Hoon Jeon ,  Satoru Yamada ,  Sang-Yeon Han ,  Jong-Man Park ,  Si-Ok Sohn

发明人： Chang-Hoon Jeon ,  Satoru Yamada ,  Sang-Yeon Han ,  Jong-Man Park ,  Si-Ok Sohn

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L27/108

CPC分类号： H01L29/7851 ,  H01L29/41791 ,  H01L29/66795 ,  H01L2029/7858

摘要： In a fin field effect transistor (Fin FET) and a method of manufacturing the Fin FET, the Fin FET includes an active pattern inside which insulating layer patterns are formed, an isolation layer pattern enclosing a sidewall of the active pattern such that an opening exposing a sidewall of the active pattern located between the insulating layer patterns is formed, a gate electrode formed on the active pattern to fill the opening, impurity regions formed at portions of the active pattern adjacent to sidewalls of the gate electrode, an insulating interlayer covering the active pattern and the gate electrode and contact plugs formed through portions of the insulating interlayer and the active pattern adjacent to the sidewalls of the gate electrode such that the contact plug makes contact with the impurity region.

摘要翻译： 在翅片场效应晶体管（Fin FET）和制造Fin FET的方法中，Fin FET包括其中形成绝缘层图案的有源图案，包围有源图案的侧壁的隔离层图案，使得开口露出 形成位于绝缘层图案之间的有源图案的侧壁，形成在有源图案上以填充开口的栅电极，形成在与栅电极的侧壁相邻的有源图案的部分处的杂质区，覆盖 有源图案和通过绝缘夹层的一部分和与栅电极的侧壁相邻的有源图案形成的栅电极和接触插塞，使得接触插塞与杂质区接触。

公开(公告)号：US07868564B2

公开(公告)日：2011-01-11

申请号：US12065145

申请日：2005-10-31

申请人： Yoshiyuki Iwata ,  Satoru Yamada

发明人： Yoshiyuki Iwata ,  Satoru Yamada

IPC分类号： H05H9/00

CPC分类号： H05H7/22 ,  H05H7/18

摘要： A linearity of a voltage change to a tuner insertion amount is verified for at least one of a plurality of tuners. Based on the voltage change linearity, individual voltage change data corresponding to respective insertion amounts are calculated for each of the plurality of tuners through a proportional calculation. A combination of auto-tuners and a combination of respective insertion amounts of the auto-tuners are determined using the individual voltage change data, and an adequacy of the determined combinations is verified through a direct three-dimensional electromagnetic field calculation. The combinations are determined on a condition that, when the individual voltage change data of nominated tuners are added together, respective voltage changes attributed to the nominated tuners are cancelled out to allow an entire voltage distribution to have substantially no change.

摘要翻译： 对于多个调谐器中的至少一个，验证对调谐器插入量的电压变化的线性度。 基于电压变化线性度，通过比例计算对于多个调谐器中的每一个计算对应于各个插入量的各个电压变化数据。 使用单独的电压变化数据来确定自动调谐器和自动调谐器的相应插入量的组合的组合，并且通过直接三维电磁场计算来验证所确定的组合的充分性。 这些组合是在将指定的调谐器的各个电压变化数据相加在一起的情况下确定的，抵消归因于指定的调谐器的各自的电压变化，以允许整个电压分布基本上没有变化。

公开(公告)号：US07700431B2

公开(公告)日：2010-04-20

申请号：US11153321

申请日：2005-06-16

申请人： Kensuke Okonogi ,  Kiyonori Ohyu ,  Kazutaka Manabe ,  Satoru Yamada ,  Takuo Ohashi

发明人： Kensuke Okonogi ,  Kiyonori Ohyu ,  Kazutaka Manabe ,  Satoru Yamada ,  Takuo Ohashi

IPC分类号： H01L21/8242 ,  H01L21/44

CPC分类号： H01L21/28518 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/28525 ,  H01L21/324 ,  H01L21/76877 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10888 ,  H01L27/10894 ,  H01L29/66575

摘要： A method for manufacturing a DRAM device on a silicon substrate includes: forming cell transistors in a memory cell area and other transistors in a peripheral circuit area; forming polysilicon plugs connected to diffused regions of the cell transistors and metallic plugs connected to diffused regions of the other transistors; heat treating at a temperature of 980 to 1,020 degrees C.; heat treating at a temperature of 700 to 850 degrees C.; implanting fluorine or boron fluoride into the diffused regions of the other transistors; and heat treating at a temperature of 500 to 850 degrees C.

摘要翻译： 一种用于在硅衬底上制造DRAM器件的方法包括：在存储单元区域中形成单元晶体管和在外围电路区域中形成其它晶体管; 形成连接到所述单元晶体管的扩散区域的多晶硅插塞和连接到所述另一晶体管的扩散区域的金属插塞; 在980〜1020℃的温度下进行热处理。 在700〜850℃的温度下进行热处理。 将氟或氟化硼注入其他晶体管的扩散区域; 并在500〜850℃的温度下进行热处理。

公开(公告)号：US20090261760A1

公开(公告)日：2009-10-22

申请号：US12065145

申请日：2005-10-31

申请人： Yoshiyuki Iwata ,  Satoru Yamada

发明人： Yoshiyuki Iwata ,  Satoru Yamada

IPC分类号： H05H9/00

CPC分类号： H05H7/22 ,  H05H7/18

摘要： A linearity of a voltage change to a tuner insertion amount is verified for at least one of a plurality of tuners. Based on the voltage change linearity, individual voltage change data corresponding to respective insertion amounts are calculated for each of the plurality of tuners through a proportional calculation. A combination of auto-tuners and a combination of respective insertion amounts of the auto-tuners are determined using the individual voltage change data, and an adequacy of the determined combinations is verified through a direct three-dimensional electromagnetic field calculation. The combinations are determined on a condition that, when the individual voltage change data of nominated tuners are added together, respective voltage changes attributed to the nominated tuners are cancelled out to allow an entire voltage distribution to have substantially no change.

摘要翻译： 对于多个调谐器中的至少一个，验证对调谐器插入量的电压变化的线性度。 基于电压变化线性度，通过比例计算对于多个调谐器中的每一个计算对应于各个插入量的各个电压变化数据。 使用单独的电压变化数据来确定自动调谐器和自动调谐器的相应插入量的组合的组合，并且通过直接三维电磁场计算来验证所确定的组合的充分性。 这些组合是在将指定的调谐器的各个电压变化数据相加在一起的情况下确定的，抵消归因于指定的调谐器的各自的电压变化，以允许整个电压分布基本上没有变化。

公开(公告)号：US20090202921A1

公开(公告)日：2009-08-13

申请号：US12368380

申请日：2009-02-10

申请人： Hiroyuki SUZUKI ,  Satoru Yamada

发明人： Hiroyuki SUZUKI ,  Satoru Yamada

IPC分类号： G03F7/00 ,  C07D277/64 ,  C07D263/56 ,  C07D235/16 ,  C07D405/12 ,  C07D209/18 ,  C07D417/12

CPC分类号： G03F7/001 ,  C07D405/12 ,  C07D417/12 ,  G03F7/027 ,  G03F7/029 ,  G11B7/00781 ,  G11B7/24038 ,  G11B7/24044 ,  G11B7/246 ,  G11B7/2472 ,  G11B7/2531 ,  G11B7/2534 ,  G11B7/258

摘要： The present invention provides an optical recording composition comprising at least one compound denoted by general formula (I) and a holographic recording medium comprising a recording layer, wherein the recording layer comprises at least one compound denoted by general formula (I). In general formula (I), each of A1 and A2 independently denotes —CR4R5—, —O—, —NR6—, —S—, or —C(═O)—, each of R4, R5, and R6 independently denotes a hydrogen atom or a substituent, R1 denotes a substituent, n denotes an integer ranging from 0 to 4, each of R2 and R3 independently denotes a substituent having a Hammett substituent constant, σp value, of greater than 0, R2 and R3 do not form a ring structure by bonding together, and at least one from among R1, R2, R3, A1, and A2 comprises at least one polymerizable group.

摘要翻译： 本发明提供一种包含至少一种由通式（I）表示的化合物和包含记录层的全息记录介质的光学记录组合物，其中该记录层包含至少一种由通式（I）表示的化合物。 在通式（I）中，A 1和A 2各自独立地表示-CR 4 R 5 - ， - O - ， - NR 6 - ， - S-或-C（-O） - ，R 4，R 5和R 6各自独立地表示 氢原子或取代基，R1表示取代基，n表示0〜4的整数，R2和R3各自独立地表示具有哈米特取代基常数，sigmap值大于0的取代基，R2和R3不形成 R 1，R 2，R 3，A 1和A 2中的至少一个包含至少一个可聚合基团。

公开(公告)号：US20090139145A1

公开(公告)日：2009-06-04

申请号：US12285237

申请日：2008-09-30

申请人： Takashi Watanabe ,  Satoru Yamada

发明人： Takashi Watanabe ,  Satoru Yamada

IPC分类号： E05D15/50 ,  E05F11/24

CPC分类号： E05D15/502 ,  E05Y2900/606 ,  G06F1/181

摘要： A door includes a door body, a pair of rotating shafts, a pair of opening/closing levers and an inhibiting member. The pair of rotating shafts rotate the door body toward either one of the left and right directions. The pair of rotating shafts are provided on each of the left and right sides of the door body. The pair of rotating shafts are vertically slidable. The pair of opening/closing levers are provided on each of the left and right sides of the door body. The opening/closing lever is connected to the rotating shaft on the same side of the door body. The opening/closing lever acommodates the connected rotating shaft within the door body by rotation. The inhibiting member inhibits one of the rotating shafts from being accommodated within the door body by operating simultaneously with rotation of the opening/closing lever connected to the other rotating shaft.

摘要翻译： 门包括门体，一对旋转轴，一对打开/关闭杆和禁止构件。 一对旋转轴将门体朝向左右两个方向旋转。 一对旋转轴设置在门体的左右两侧。 一对旋转轴可垂直滑动。 一对打开/关闭杆设置在门体的左右两侧。 开/关杆与门体同侧的旋转轴连接。 打开/关闭杆通过旋转来接合门体内的连接的旋转轴。 禁止构件通过与连接到另一旋转轴的开/关杆的旋转同时操作而阻止旋转轴中的一个被容纳在门体内。

公开(公告)号：US20070144245A1

公开(公告)日：2007-06-28

申请号：US11598056

申请日：2006-11-13

申请人： Toshio Yamada ,  Toshihiko Hijikata ,  Satoru Yamada

发明人： Toshio Yamada ,  Toshihiko Hijikata ,  Satoru Yamada

IPC分类号： G01M19/00 ,  B01J8/02 ,  B01D53/00 ,  F01N3/10 ,  F01N3/02

CPC分类号： G01N1/2205 ,  F01N3/031 ,  F01N3/2053 ,  F01N11/002 ,  F01N2550/20 ,  F01N2560/022 ,  F01N2560/023 ,  F01N2560/026 ,  F01N2560/027 ,  G01N1/2252 ,  Y02T10/20 ,  Y02T10/47

摘要： A means suitable for producing and supplying exhaust gas for evaluation to be supplied to an exhaust gas purifying apparatus in a safe and stable manner and a means for correctly and accurately evaluating performance and durability of the exhaust gas purifying apparatus are provided. The PM generating apparatus 10 which can generate PM in a gas by combusting a liquid and/or gaseous fuel in the combustion chamber 2. The PM generating apparatus 10 is provided with a combustion chamber 1, a combustion air supply means 4 supplying combustion air to the combustion chamber 1, and an intermittent fuel injection means 3 which can intermittently inject the fuel to the combustion air supplied to the combustion chamber 1.

摘要翻译： 提供了一种适用于生产和供应用于评价的废气以便以安全和稳定的方式供给到废气净化装置的装置，以及用于正确和准确地评估废气净化装置的性能和耐久性的装置。 能够通过在燃烧室2内燃烧液体和/或气体燃料而在气体中产生PM的PM生成装置10。 PM生成装置10设置有燃烧室1，向燃烧室1供给燃烧空气的燃烧空气供给装置4以及可间歇地将燃料喷射到供给燃烧室的燃烧空气的间歇燃料喷射装置3 1。

公开(公告)号：US20070111150A1

公开(公告)日：2007-05-17

申请号：US11598087

申请日：2006-11-13

申请人： Toshihiko Hijikata ,  Satoru Yamada ,  Yukio Miyairi

发明人： Toshihiko Hijikata ,  Satoru Yamada ,  Yukio Miyairi

IPC分类号： F23D14/46

CPC分类号： C09C1/50 ,  C01P2004/64 ,  F23D2900/21007

摘要： A means capable of supplying exhaust gas sufficiently imitating exhaust gas from actual diesel engines is provided. A PM generating apparatus has a constitution in which combustion air supplied to the space between a chassis and an outer casing via an air inlet is introduced into the space between the outer casing and an inner casing via through-holes of the outer casing, and a fuel injected by an fuel-injection means into the space between the chassis and the outer casing is introduced into the space between the outer casing and the inner casing via the through-holes of the outer casing, wherein the fuel is combusted to generate PM.

摘要翻译： 提供了一种能够充分模拟来自实际柴油发动机的废气的废气的装置。 PM生成装置具有这样的结构，其中经由空气入口供给到底盘和外壳之间的空气的燃烧空气经由外壳的通孔引入到外壳和内壳之间的空间中，并且 通过燃料喷射装置喷射到底盘和外壳之间的空间的燃料经由外壳的通孔引入到外壳和内壳之间的空间中，其中燃料燃烧以产生PM。

公开(公告)号：US20070072124A1

公开(公告)日：2007-03-29

申请号：US11522973

申请日：2006-09-19

申请人： Satoru Yamada

发明人： Satoru Yamada

IPC分类号： G11B7/24

CPC分类号： G11B7/245 ,  G11B7/0065 ,  G11B7/246 ,  G11B7/258

摘要： A optical recording composition is provided that comprises a matrix and a monomer, wherein the matrix comprises a polyfunctional isocyanate, a radical-polymerizable compound and a polyfunctional alcohol, and the radical-polymerizable compound contains at least one of an amino group, a carboxyl group, an acid anhydride and an isocyanate group; and also an optical recording is provided that is formed from the optical recording composition.

摘要翻译： 提供了一种光学记录组合物，其包含基质和单体，其中所述基质包含多官能异氰酸酯，可自由基聚合的化合物和多官能醇，并且所述可自由基聚合的化合物包含氨基，羧基中的至少一个 ，酸酐和异氰酸酯基; 并且还提供由光学记录组合物形成的光学记录。

公开(公告)号：US07141471B2

公开(公告)日：2006-11-28

申请号：US10469819

申请日：2002-02-07

申请人： Satoru Yamada ,  Hiroyuki Enomoto ,  Nobuya Saito ,  Tsuyoshi Kawagoe ,  Hisaomi Yamashita

发明人： Satoru Yamada ,  Hiroyuki Enomoto ,  Nobuya Saito ,  Tsuyoshi Kawagoe ,  Hisaomi Yamashita

IPC分类号： H01L21/8242

CPC分类号： H01L27/10885 ,  H01L21/76831 ,  H01L21/7684 ,  H01L21/76895 ,  H01L21/76897 ,  H01L27/10814 ,  H01L27/10888 ,  H01L27/10891 ,  H01L27/10894 ,  H01L27/10897

摘要： A sidewall insulating film (11) made of a silicon oxide film is formed on the sidewall of a gate electrode (7) (word line) with an aim to reduce the capacitance to the word line serving as the major component of the bit line capacitance. Also, when openings for connecting the bit lines are formed above the spaces of the gate electrodes (7) (word lines) by the dry etching of a silicon oxide film (31) above contact holes (12), a silicon nitride film (19) to be an etching stopper is provided below the silicon oxide film (31) so as to reduce the amount of the bottom surface of the opening receded below the upper surface of a cap insulating film (9).

摘要翻译： 在栅电极（7）（字线）的侧壁上形成由氧化硅膜构成的侧壁绝缘膜（11），目的在于减小作为位线电容的主要成分的字线的电容 。 此外，当通过在接触孔（12）上方的氧化硅膜（31）的干法蚀刻形成氮化硅膜（19）时，用于连接位线的开口形成在栅电极（7）（字线）的空间上方 ）设置在氧化硅膜（31）的下方，以便减少开口的下表面在盖绝缘膜（9）的上表面下方的量。