公开(公告)号：US5372615A

公开(公告)日：1994-12-13

申请号：US138261

申请日：1993-10-20

申请人： Masayuki Mizuno ,  Katsuji Yamanaka ,  Satosi Inatomi ,  Kenji Namba

发明人： Masayuki Mizuno ,  Katsuji Yamanaka ,  Satosi Inatomi ,  Kenji Namba

IPC分类号： A01G1/04 ,  C12M1/12 ,  C12M1/24

CPC分类号： A01G1/046

摘要： A bin cap for mushroom culture bins for cultivating mushrooms such as shiitake (Lentinus edodes (Berk.) Sing.), Lyophyllum shimeji (Kawam.) Hongo, and the like which includes a housing part 2 including a space S internally for ventilation and having windows 2w for ventilation with a broader open area than the open area of bin mouth Bo, breathable filter part 3 blocking window 2w, and fitting part 4 being installed at the under surface 2d of housing part 2 and being attached to or detached from bin mouth Bo. Thereby, the ventilation is secured and the exhaust of carbon dioxide is promoted.

摘要翻译： 用于培养诸如香菇（香菇（Berk。）Sing）等蘑菇的蘑菇培养箱的箱盖，包括具有内部用于通风的空间S的壳体部分2，并且具有用于通风的壳体部分2， 窗口2w通风比开口区域更大的开口区域Bo，透气过滤器部分3阻挡窗2w，以及装配部分4安装在壳体部分2的下表面2d处并且被附接到箱口或从箱口拆下 博。 由此，能够确保通气，促进二氧化碳的排出。

公开(公告)号：USD323495S

公开(公告)日：1992-01-28

申请号：US466822

申请日：1990-01-16

申请人： Masayuki Mizuno ,  Masahiro Hashizume ,  Shigetoshi Ishikawa

设计人： Masayuki Mizuno ,  Masahiro Hashizume ,  Shigetoshi Ishikawa

公开(公告)号：US4623242A

公开(公告)日：1986-11-18

申请号：US773974

申请日：1985-09-09

申请人： Kiyoshi Hayashi ,  Setsuo Hori ,  Nobuyuki Hirata ,  Kazuhiro Kobayashi ,  Masayuki Mizuno

发明人： Kiyoshi Hayashi ,  Setsuo Hori ,  Nobuyuki Hirata ,  Kazuhiro Kobayashi ,  Masayuki Mizuno

IPC分类号： G03G15/04 ,  G03G21/16 ,  G06K15/12 ,  G03G15/00

CPC分类号： G06K15/1223 ,  G03G15/04 ,  G03G21/1628 ,  G03G21/1647 ,  G06K15/1204 ,  G03G15/0435 ,  G03G2221/1636 ,  G03G2221/1651 ,  G03G2221/1654

摘要： An image-forming apparatus equipped with an optical means, an electrostatic image-forming means and a control means. The optical means projects a scanned light beam to be controlled according to an image to be formed. The image-forming means receives the scanned light beam projected from the optical means and forms an image corresponding to the scanned light beam. The control means controls the optical means and the image-forming means.

公开(公告)号：US08330483B2

公开(公告)日：2012-12-11

申请号：US12516583

申请日：2007-11-22

申请人： Masayuki Mizuno

发明人： Masayuki Mizuno

IPC分类号： G01R31/26

CPC分类号： G01R31/3004 ,  G01R31/3008

摘要： Disclosed is a semiconductor device in which a circuit in the semiconductor chip is divided into a plurality of sub-circuits. The semiconductor device includes switches between the respective sub-circuits and a power supply, and a circuit that variably controls on-resistances of the switches 111 to 11N.

摘要翻译： 公开了一种半导体器件，其中半导体芯片中的电路被分成多个子电路。 半导体器件包括各个子电路和电源之间的开关，以及可变地控制开关111至11N的导通电阻的电路。

公开(公告)号：US08330254B2

公开(公告)日：2012-12-11

申请号：US12647639

申请日：2009-12-28

申请人： Masayuki Furumiya ,  Hiroaki Ohkubo ,  Fuyuki Okamoto ,  Masayuki Mizuno ,  Koichi Nose ,  Yoshihiro Nakagawa ,  Yoshio Kameda

发明人： Masayuki Furumiya ,  Hiroaki Ohkubo ,  Fuyuki Okamoto ,  Masayuki Mizuno ,  Koichi Nose ,  Yoshihiro Nakagawa ,  Yoshio Kameda

IPC分类号： H01L23/544

CPC分类号： H01L23/48 ,  G01R31/2884 ,  G01R31/3025 ,  G01R31/31721 ,  H01L22/32 ,  H01L23/50 ,  H01L23/5286 ,  H01L23/544 ,  H01L24/06 ,  H01L2223/5446 ,  H01L2924/01029

摘要： A semiconductor device includes a semiconductor wafer in which semiconductor chip forming regions and a scribe region located between the semiconductor chip forming regions are formed, a plurality of semiconductor chip circuit portions provided over the semiconductor wafer, a plurality of first conductive layers, provided in each of the semiconductor chip forming regions, which is electrically connected to each of the circuit portions, and a first connecting portion that electrically connects the first conductive layers to each other across a portion of the scribe region. An external power supply or grounding pad is connected to any one of the first conductive layer and the first connecting portion. The semiconductor device includes a communication portion, connected to the circuit portion, which performs communication with the outside by capacitive coupling or inductive coupling.

摘要翻译： 一种半导体器件包括其半导体芯片形成区域和位于半导体芯片形成区域之间的划线区域形成的半导体晶片，设置在半导体晶片上的多个半导体芯片电路部分，设置在每个半导体芯片形成区域中的多个第一导电层 电连接到每个电路部分的半导体芯片形成区域以及跨越划线区域的一部分将第一导电层彼此电连接的第一连接部分。 外部电源或接地焊盘连接到第一导电层和第一连接部分中的任一个。 半导体器件包括连接到电路部分的通信部分，其通过电容耦合或电感耦合与外部进行通信。

公开(公告)号：US08178974B2

公开(公告)日：2012-05-15

申请号：US12356589

申请日：2009-01-21

申请人： Masayuki Mizuno

发明人： Masayuki Mizuno

IPC分类号： H01L23/58

CPC分类号： H01P3/081 ,  H01L23/5225 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/1903 ,  H01L2924/3011 ,  H01L2924/00

摘要： A semiconductor device comprising a signal transmission line of a microstrip structure, capable of increasing the characteristic impedance of the signal transmission line and reducing coupling between a plurality of signal lines. In a signal transmission line of a microstrip structure composed of a signal line and a ground plate, the capacitance between wires is reduced and the characteristic impedance can be increased by forming holes in the signal line or in the ground plate. The coupling between a plurality of signal lines can also be reduced.

摘要翻译： 一种包括微带结构的信号传输线的半导体器件，其能够增加信号传输线的特性阻抗并减少多个信号线之间的耦合。 在由信号线和接地板组成的微带结构的信号传输线中，通过在信号线或接地板中形成孔，电线之间的电容降低，并且可以增加特性阻抗。 也可以减少多个信号线之间的耦合。

公开(公告)号：US08118591B2

公开(公告)日：2012-02-21

申请号：US12280811

申请日：2007-03-15

申请人： Terumasa Ishihara ,  Takaharu Hashimoto ,  Masayuki Mizuno ,  Masaru Morita

发明人： Terumasa Ishihara ,  Takaharu Hashimoto ,  Masayuki Mizuno ,  Masaru Morita

IPC分类号： F27D5/00

CPC分类号： H01L21/324 ,  H01L21/67103

摘要： A heat shield plate for a substrate annealing apparatus is provided with a horizontally supported flat-plate-like substrate 1, a heater 5 positioned above the substrate to heat the upper surface of the substrate with radiation heat, and a heat shield plate 10 horizontally movable between a shielding position where the substrate is shielded from heater and an open position out of the shielding position. The heat shield plate 10 is composed of a structural member 12 made of a low thermal expansion material (carbon composite material) which is hardly deformed due to a temperature difference in the shielding position, and a heat insulating member 14 which covers the upper surface of the structural member and keeps the surface at an allowable temperature or below.

摘要翻译： 用于基板退火装置的隔热板设置有水平支撑的平板状基板1，位于基板上方的加热器5，以用辐射热加热基板的上表面，并且隔热板10水平移动 在基板被屏蔽的屏蔽位置和屏蔽位置之间的打开位置之间。 隔热板10由由遮蔽位置的温度差异而几何变形的低热膨胀性材料（碳复合材料）构成的结构体12，覆盖上述表面的绝热构件14 结构件并将表面保持在允许的温度或更低的温度。

公开(公告)号：US20120025790A1

公开(公告)日：2012-02-02

申请号：US13146806

申请日：2010-02-09

申请人： Koichiro Noguchi ,  Koichi Nose ,  Yoshihiro Nakagawa ,  Masayuki Mizuno

发明人： Koichiro Noguchi ,  Koichi Nose ,  Yoshihiro Nakagawa ,  Masayuki Mizuno

IPC分类号： G05F1/10

CPC分类号： G01R31/31721 ,  G05F1/607

摘要： An electronic circuit includes: a first power line capable of supplying power; a second power line capable of supplying power independently from the first power line; a main circuit connected to the second power line; a detector that detects the supply of power from the first power line or the second power line; and a controller connected to the first power line and the second power line, wherein the controller controls a voltage or a current supplied from the first power line and supplies the voltage or the current to the main circuit when the detector detects supply of power from the first power line.

摘要翻译： 电子电路包括：能够供电的第一电力线; 能够独立于所述第一电力线供电的第二电力线; 连接到第二电力线的主电路; 检测器，其检测来自所述第一电力线或所述第二电力线的电力供应; 以及连接到所述第一电力线和所述第二电力线的控制器，其中，所述控制器控制从所述第一电力线提供的电压或电流，并且当所述检测器检测到来自所述主电路的电力供应时，将电压或电流提供给所述主电路 第一条电力线。

公开(公告)号：US08093919B2

公开(公告)日：2012-01-10

申请号：US12514364

申请日：2007-11-06

申请人： Masayuki Mizuno

发明人： Masayuki Mizuno

IPC分类号： G01R31/02

CPC分类号： G01R31/31724 ,  G01R31/3187

摘要： It is possible to provide a circuit and method for carrying out a parallel test using BOST (Built Out Self Test). The circuit includes first transfer circuits (11-1, 11-2, . . . ) that extract a data pattern supplied to a complete operating article chip (10) in a BOST (3) from the BOST and that successively transmit the data pattern in response to a clock signal, and second transfer circuits (12-1, 12-2, . . . ) that extract output data from the complete operating article chip (10) as an expectation value pattern and that successively transmit the expectation value pattern in response to the clock signal. The data pattern supplied to the complete operating article chip (10) is applied to one chip to be measured (10-1) and the data pattern from a corresponding stage of the first transfer circuits (11-1, 11-2, . . . ) is applied to each of other chips to be measured (10-2, . . . ). A comparator (14-1) compares output data from the one chip to be measured (10-1) to the output data from the complete operating article chip (10) to decide whether or not they coincide. Corresponding to the other chips to be measured (10-2, . . . ), a comparator (14-2, . . . ) compares respective output data from the other chips to be measured to the expectation value pattern from the corresponding stage of the second transfer circuits (12-1, 12-2, . . . ) to decide whether or not they coincide.

摘要翻译： 可以提供使用BOST（内置自检）进行并行测试的电路和方法。 该电路包括从BOST提取在BOST（3）中提供给完整的操作物品芯片（10）的数据模式的第一传输电路（11-1,11-2 ...），并连续发送数据模式 以及响应于时钟信号的第二传送电路（12-1,12-2 ...），其将来自完整的操作物品芯片（10）的输出数据提取为期望值模式，并且连续发送期望值模式 响应时钟信号。 提供给完整的操作物品芯片（10）的数据模式被应用于要测量的一个芯片（10-1）和来自第一传输电路（11-1,11-2，...）的相应级的数据模式。 。）施加到要测量的其他芯片（10-2，...）中。 比较器（14-1）将来自所测量的一个芯片（10-1）的输出数据与来自完整的操作物品芯片（10）的输出数据进行比较，以确定它们是否一致。 对应于待测量的其他芯片（10-2，...），比较器（14-2 ...）将来自待测量的其它芯片的输出数据与来自相应级的期望值模式相比较 第二传输电路（12-1,12-2 ...）来决定它们是否一致。

公开(公告)号：US20110260747A1

公开(公告)日：2011-10-27

申请号：US13139609

申请日：2009-12-22

申请人： Yoshio Kameda ,  Yoshihiro Nakagawa ,  Koichiro Noguchi ,  Masayuki Mizuno ,  Koichi Nose

发明人： Yoshio Kameda ,  Yoshihiro Nakagawa ,  Koichiro Noguchi ,  Masayuki Mizuno ,  Koichi Nose

IPC分类号： G01R31/26 ,  G05F1/10

CPC分类号： G01R31/2884 ,  G01R31/3012

摘要： A semiconductor device (1) includes a semiconductor wafer (11) on which a plurality of semiconductor chip forming regions (1A) is formed, a circuit section (12) which is provided within each of the semiconductor chip forming regions (1A) of the semiconductor wafer (11), a control circuit section (14), provided within each of the semiconductor chip forming regions (1A) and connected to the circuit section (12), that controls electric power supplied to the circuit section (12), a power supply line (18) connected to the plurality of control circuit section (14), and a reference power line (17) connected to the plurality of control circuit section (14). In each of the control circuit sections (14), a voltage of electric power supplied from the power supply line (18) is controlled on the basis of a reference voltage from the reference power line (17).

摘要翻译： 半导体器件（1）包括其上形成有多个半导体芯片形成区域（1A）的半导体晶片（11），设置在所述半导体芯片形成区域（1A）的每一个内的电路部分（12） 半导体晶片（11），设置在每个半导体芯片形成区域（1A）内并连接到电路部分（12））的控制电路部分（14），其控制供应到电路部分（12）的电力， 连接到多个控制电路部分（14）的电源线（18）和连接到多个控制电路部分（14）的参考电力线（17）。 在每个控制电路部分（14）中，基于来自参考电力线（17）的参考电压来控制从电源线（18）供应的电力的电压。