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    Multi-Liner TSV Structure and Method Forming Same
    93.
    发明申请
    Multi-Liner TSV Structure and Method Forming Same 有权

    公开(公告)号：US20220020675A1

    公开(公告)日：2022-01-20

    申请号：US17135435

    申请日：2020-12-28

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Ming-Fa Chen ,  Chin-Shyh Wang ,  Chao-Wen Shih

    IPC: H01L23/498 ,  H01L21/768 ,  H01L21/762

    Abstract: A method includes etching a substrate to form an opening, depositing a first dielectric liner extending into the opening, and depositing a second dielectric liner over the first dielectric liner. The second dielectric liner extends into the opening. A conductive material is filled into the opening. The method further includes performing a first planarization process to planarize the conductive material so that a portion of the conductive material in the opening forms a through-via, performing a backside grinding process on the substrate until the through-via is revealed from a backside of the substrate, and forming a conductive feature on the backside of the substrate. The conductive feature is electrically connected to the through-via.

    Semiconductor structure and method manufacturing the same
    95.
    发明授权
    Semiconductor structure and method manufacturing the same 有权

    公开(公告)号：US11164848B2

    公开(公告)日：2021-11-02

    申请号：US16737869

    申请日：2020-01-08

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Ming-Fa Chen ,  Chao-Wen Shih ,  Min-Chien Hsiao ,  Sung-Feng Yeh ,  Tzuan-Horng Liu ,  Chuan-An Cheng

    IPC: H01L25/065 ,  H01L23/48 ,  H01L25/00 ,  H01L23/31

    Abstract: A semiconductor structure includes a stacked structure. The stacked structure includes a first semiconductor die and a second semiconductor die. The first semiconductor die includes a first semiconductor substrate having a first active surface and a first back surface opposite to the first active surface. The second semiconductor die is over the first semiconductor die, and includes a second semiconductor substrate having a second active surface and a second back surface opposite to the second active surface. The second semiconductor die is bonded to the first semiconductor die through joining the second active surface to the first back surface at a first hybrid bonding interface along a vertical direction. Along a lateral direction, a first dimension of the first semiconductor die is greater than a second dimension of the second semiconductor die.

    Semiconductor package structure
    98.
    发明授权
    Semiconductor package structure 有权

    公开(公告)号：US11004810B2

    公开(公告)日：2021-05-11

    申请号：US16714768

    申请日：2019-12-15

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Kai-Chiang Wu ,  Chun-Lin Lu ,  Chao-Wen Shih ,  Han-Ping Pu ,  Nan-Chin Chuang

    IPC: H01L23/66 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01Q21/06 ,  H01Q1/22 ,  H01L23/31 ,  H01L21/683 ,  H01Q21/28 ,  H01Q1/40

    Abstract: A semiconductor package structure including an encapsulation body, an RFIC chip, a first antenna structure, and a second antenna structure is provided. The RFIC chip may be embedded in the encapsulation body. The first antenna structure may be disposed at a lateral side of the RFIC chip, electrically connected to the RFIC chip, and include a first conductor layer and a plurality of first patches opposite to the first conductor layer. The second antenna structure may be stacked on the RFIC chip, electrically connected to the RFIC chip, and include a second conductor layer and a plurality of second patches opposite to the second conductor layer. The first patches and the second patches are located at a surface of the encapsulation body. A first distance between the first conductor layer and the first patches is different from a second distance between the second conductor layer and the second patches.

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