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    Packae structure, RDL structure and method of forming the same
    91.
    发明授权
    Packae structure, RDL structure and method of forming the same 有权

    公开(公告)号：US10510646B2

    公开(公告)日：2019-12-17

    申请号：US15905756

    申请日：2018-02-26

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Tzung-Hui Lee ,  Hung-Jui Kuo ,  Ming-Che Ho

    IPC: H01L23/498 ,  H01L25/11 ,  H01L23/31 ,  H01L21/48

    Abstract: A package structure, a RDL structure and a method of forming the same are provided. The package structure includes a die, an encapsulant, a RDL structure, and a connector. The encapsulant is aside the die. The RDL structure is electrically connected to the die. The connector is connected to the die through the RDL structure. The RDL structure includes a dielectric layer, a first RDL and a second RDL. The dielectric layer is on the encapsulant and the die. The first RDL is penetrating through the dielectric layer to connect to the die, the first RDL comprises a first via and a first trace on the first via. The second RDL is on the first RDL. The second RDL comprises a second via and a second trace on the second via. The second via contacts and covers a portion of a top surface and a portion of sidewalls of the first trace.

    SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
    93.
    发明申请
    SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF 审中-公开

    公开(公告)号：US20190333782A1

    公开(公告)日：2019-10-31

    申请号：US15964092

    申请日：2018-04-27

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Po-Han Wang ,  Hung-Jui Kuo ,  Yu-Hsiang Hu

    IPC: H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/04 ,  H01L23/498 ,  H01L21/48 ,  H01L25/065 ,  H01L25/00

    Abstract: A semiconductor package manufacturing method thereof are provided. The semiconductor package includes a high-power device die, a redistribution structure, a heat dissipation module and a molding compound. The high-power device die has a front side and a back side opposite to the front side. The redistribution structure is disposed at the front side. The heat dissipation module is in direct contact with the back side. The molding compound is disposed between the redistribution structure and the heat dissipation module, and surrounding the high-power device die. The molding compound has a body portion and an extended portion. An interface between the body portion and the heat dissipation module is substantially parallel to the back side of the high-power device die. A thickness of the extended portion is greater than a thickness of the body portion.

    Integrated fan-out package and method of fabricating an integrated fan-out package
    94.
    发明授权
    Integrated fan-out package and method of fabricating an integrated fan-out package 有权

    公开(公告)号：US10446521B2

    公开(公告)日：2019-10-15

    申请号：US15846234

    申请日：2017-12-19

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Hung-Jui Kuo ,  Yu-Hsiang Hu ,  Sih-Hao Liao

    IPC: H01L23/48 ,  H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

    Abstract: In accordance with some embodiments of the present disclosure, an integrated fan-out (INFO) package includes a substrate, a molding compound, a buffer layer, a first chip, a second chip, and a redistribution circuit structure layer. The molding compound is disposed on the substrate. The buffer layer is disposed on the substrate and includes a first buffer pattern and a second pattern separated from the first buffer pattern by a distance. A thickness of the first buffer pattern is greater than a thickness of the second buffer pattern. The first chip is attached to the substrate through the first buffer pattern and surrounded by the molding compound. The second chip is attached to the substrate through the second buffer pattern and surrounded by the molding compound. The redistribution circuit structure layer is disposed on the molding compound and electrically connected to the first chip and the second chip.

    INTEGRATED FAN-OUT PACKAGE AND METHOD OF FABRICATING THE SAME
    95.
    发明申请
    INTEGRATED FAN-OUT PACKAGE AND METHOD OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20190279929A1

    公开(公告)日：2019-09-12

    申请号：US16416278

    申请日：2019-05-20

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yi-Wen Wu ,  Hung-Jui Kuo ,  Ming-Che Ho

    IPC: H01L23/522 ,  H01L23/532 ,  H01L21/768 ,  H01L23/00 ,  H01L23/538

    Abstract: An integrated fan-out package includes a die, an insulating encapsulation, a redistribution circuit structure, conductive terminals, and barrier layers. The insulating encapsulation encapsulates the die. The redistribution circuit structure includes a first redistribution conductive layer on the insulating encapsulation, a first inter-dielectric layer covering the first redistribution conductive layer, and a second redistribution conductive layer on the first inter-dielectric layer. The first redistribution conductive layer includes conductive through vias extending from a first surface of the insulating encapsulation to a second surface of the insulating encapsulation. The first inter-dielectric layer includes contact openings, portions of the second redistribution conductive layer filled in the contact openings are in contact with the first redistribution conductive layer and offset from the conductive through vias. The conductive terminals are disposed over the second surface of the insulating encapsulation. The barrier layers respectively are disposed between the conductive through vias and the conductive terminals.

    Package structure and method of fabricating the same
    97.
    发明授权
    Package structure and method of fabricating the same 有权

    公开(公告)号：US10332856B2

    公开(公告)日：2019-06-25

    申请号：US15806347

    申请日：2017-11-08

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wei-Chih Chen ,  Hung-Jui Kuo ,  Yu-Hsiang Hu ,  Sih-Hao Liao ,  Po-Han Wang

    IPC: H01L25/11 ,  H01L23/00 ,  H01L25/04 ,  H01L25/07 ,  H01L25/075 ,  H01L25/065

    Abstract: A package structure including at least one semiconductor die, an insulating encapsulant, an insulating layer, conductive pillars, a dummy pillar, a first seed layer and a redistribution layer is provided. The semiconductor die have a first surface and a second surface opposite to the first surface. The insulating encapsulant is encapsulating the semiconductor die. The insulating layer is disposed on the first surface of the semiconductor die and on the insulating encapsulant. The conductive pillars are located on the semiconductor die. The dummy pillar is located on the insulating encapsulant. The first seed layer is embedded in the insulating layer, wherein the first seed layer is located in between the conductive pillars and the semiconductor die, and located in between the dummy pillar and the insulating encapsulant. The redistribution layer is disposed over the insulating layer and is electrically connected to the semiconductor die through the conductive pillars.

    Integrated fan-out package and method of fabricating the same
    98.
    发明授权
    Integrated fan-out package and method of fabricating the same 有权

    公开(公告)号：US10297544B2

    公开(公告)日：2019-05-21

    申请号：US15716476

    申请日：2017-09-26

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yi-Wen Wu ,  Hung-Jui Kuo ,  Ming-Che Ho

    IPC: H01L23/52 ,  H01L23/522 ,  H01L23/00 ,  H01L23/532 ,  H01L21/768

    Abstract: Provided is an integrated fan-out package including a die, an insulating encapsulation, a redistribution circuit structure, a conductive terminal, and a barrier layer. The die is encapsulated by the insulating encapsulation. The redistribution circuit structure includes a redistribution conductive layer. The redistribution conductive layer is disposed in the insulating encapsulation and extending from a first surface of the insulating encapsulation to a second surface of the insulating encapsulation. The conductive terminal is disposed over the second surface of the insulating encapsulation. The barrier layer is sandwiched between the redistribution conductive layer and the conductive terminal. A material of the barrier layer is different from a material of the redistribution conductive layer and a material of the conductive terminal. A method of fabricating the integrated fan-out package is also provided.

    PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME
    100.
    发明申请
    PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20190139847A1

    公开(公告)日：2019-05-09

    申请号：US15846232

    申请日：2017-12-19

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Po-Han Wang ,  Hung-Jui Kuo ,  Yu-Hsiang Hu

    IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L21/3105

    Abstract: A package structure and a method of manufacturing the same are provided. The package structure includes a die, a first encapsulant, a second encapsulant, a protection layer, a RDL structure and a connector. The first encapsulant is aside a first sidewall of the die, at least encapsulating a portion of the first sidewall of the die. The second encapsulant is aside a second sidewall of the die, encapsulating the second sidewall of the die. The protection layer is aside the first sidewall of the die and on the first encapsulant. The RDL structure is on a first surface of the die. The connector is electrically connected to the die through the RDL structure.

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