公开(公告)号：US08587569B2

公开(公告)日：2013-11-19

申请号：US13082660

申请日：2011-04-08

申请人： Shinya Ono

发明人： Shinya Ono

IPC分类号： G06F3/038 ,  G09G5/00 ,  G09G3/30

CPC分类号： G09G3/12 ,  G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2300/0876 ,  G09G2310/0218 ,  G09G2310/0221

摘要： An image display device includes luminescence pixels arranged in rows and columns. The image display device includes a first signal line and a second signal line, first control lines, and at least two drive blocks. Each drive block is composed of luminescence pixels in at least two of the rows. Each luminescence pixel includes a luminescence element and a current controller. Each of the luminescence pixels that belong to a kth drive block further includes a first switch provided between the first signal line and the current controller. Each of the luminescence pixels that belong to a (k+1)th drive block further includes a second switch provided between the second signal line and the current controller. Each of the first control lines is connected to all of the luminescence pixels in one of the drive blocks and not connected to the luminescence pixels in a different drive block.

摘要翻译： 图像显示装置包括以行和列排列的发光像素。 图像显示装置包括第一信号线和第二信号线，第一控制线和至少两个驱动块。 每个驱动块由至少两行中的发光像素构成。 每个发光像素包括发光元件和电流控制器。 属于第k个驱动块的每个发光像素还包括设置在第一信号线和电流控制器之间的第一开关。 属于第（k + 1）驱动块的每个发光像素还包括设置在第二信号线和电流控制器之间的第二开关。 每个第一控制线连接到驱动块之一中的所有发光像素，并且不连接到不同驱动块中的发光像素。

公开(公告)号：US08581806B2

公开(公告)日：2013-11-12

申请号：US11180674

申请日：2005-07-14

申请人： Toshihiro Sato ,  Yoshiyuki Kaneko ,  Yoshiro Mikami ,  Takayuki Ouchi

发明人： Toshihiro Sato ,  Yoshiyuki Kaneko ,  Yoshiro Mikami ,  Takayuki Ouchi

IPC分类号： G09G3/30

CPC分类号： H01L27/3276 ,  G09G3/3233 ,  G09G3/3241 ,  G09G2300/0465 ,  G09G2300/0842 ,  G09G2300/0876 ,  G09G2310/0262 ,  H01L27/3248 ,  H01L27/3265

摘要： A display module includes a pixel disposed in respective intersections between a plurality of scanning lines and a plurality of data lines, which lines are aligned in a matrix, and a current supply line that supplies electric current to the pixel, the pixel includes a data storage device for storing a data signal supplied from the data lines, and an emitting device that emits light by the electric current supplied by the current supply line according to the data signal stored in the data storage device. One terminal of the data signal storage device is connected to one of the scanning lines placed anteriorly of to the pixel that is being selected.

摘要翻译： 显示模块包括设置在多个扫描线和多个数据线之间的各个交点中的像素，这些线以矩阵形式排列，以及向该像素提供电流的电流供给线，该像素包括数据存储 用于存储从数据线提供的数据信号的装置，以及发射装置，其通过根据存储在数据存储装置中的数据信号由当前电源线提供的电流发光。 数据信号存储装置的一个端子连接到放置在正被选择的像素之前的扫描线之一。

公开(公告)号：US20130285561A1

公开(公告)日：2013-10-31

申请号：US13826533

申请日：2013-03-14

申请人： SEIKO EPSON CORPORATION

发明人： Kazuma KITADANI ,  Shin FUJITA

IPC分类号： H05B37/02

CPC分类号： G09G3/3225 ,  G09G3/3233 ,  G09G3/3291 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2300/0876 ,  G09G2310/0262 ,  G09G2310/0297 ,  G09G2320/0233 ,  G09G2320/043 ,  H05B37/02

摘要： Provided is an electro-optic device including: a first pixel circuit that is provided corresponding to a position where one scanning line and a first data line are intersect with each other; a second pixel circuit that is provided corresponding to a position where the one scanning line and a second data line are intersect with each other; a first level shift unit circuit that shifts electric potential of a first data signal so as to compress electric potential amplitude of the first data signal with a first compression rate, and supplies the signal to the first data line; and a second level shift unit circuit that shifts electric potential of a second data signal so as to compress electric potential amplitude of the second data signal with a second compression rate different from the first compression rate, and supplies the signal to the second data line.

公开(公告)号：US20130278835A1

公开(公告)日：2013-10-24

申请号：US13855368

申请日：2013-04-02

申请人： Masae KITAYAMA ,  Kentaro IRIE ,  Fumikazu SHIMOSHIKIRYOH ,  Toshihide TSUBATA ,  Naoshi YAMADA

发明人： Masae KITAYAMA ,  Kentaro IRIE ,  Fumikazu SHIMOSHIKIRYOH ,  Toshihide TSUBATA ,  Naoshi YAMADA

IPC分类号： G09G3/36

CPC分类号： G09G3/3611 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3655 ,  G09G3/3677 ,  G09G2300/0443 ,  G09G2300/0876 ,  G09G2310/0205 ,  G09G2310/0224 ,  G09G2310/0248 ,  G09G2310/0251 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/0261 ,  G09G2320/028

摘要： A gate driver creates a dummy insertion period in which the driver does not apply a gate on pulse to a scanning signal line immediately after the time of the inversion of a data signal. When a period from the time of the application of the gate on pulse to an odd numbered or even numbered scanning signal line to which the gate on pulse is applied previously to the time of the application of the gate on pulse to an even numbered or odd numbered scanning signal line to which the gate on pulse is applied later is set as an adjacent line writing time lag period for two scanning signal lines adjacent to each other, a CS control circuit allows the polarity of every CS signal to be reversed on the same cycle at least in the adjacent line writing time lag period.

摘要翻译： 门驱动器创建虚拟插入周期，其中驱动器在数据信号的反转时间之后立即将扫描信号线施加脉冲的栅极。 当从施加栅极导通脉冲的时间到预先施加栅极导通脉冲的奇数或偶数扫描信号线的时间到施加栅极导通脉冲的时间到偶数或奇数 将稍后施加栅极导通脉冲的编号扫描信号线设置为彼此相邻的两个扫描信号线的相邻线写入时间延迟时段，CS控制电路允许每个CS信号的极性相同 至少在相邻行写周期中循环。

公开(公告)号：US08558828B2

公开(公告)日：2013-10-15

申请号：US11882831

申请日：2007-08-06

申请人： Katsunori Yamazaki

发明人： Katsunori Yamazaki

IPC分类号： G09G5/00 ,  G06F3/038 ,  G09G3/36 ,  G02F1/133

CPC分类号： G09G3/3655 ,  G09G3/3614 ,  G09G2300/0876

摘要： A driving circuit of an electrooptic device comprises: a plurality of scanning lines; a plurality of data lines; first and second capacitor lines; a common electrode; pixels, the pixels each including: a pixel switching element; a pixel capacitor; and a storage capacitor; a scanning-line driving circuit; and a capacitor-line driving circuit that shifts the voltage of a first (or second) capacitor line corresponding one scanning line to a predetermined voltage when said one scanning line is selected, and when a scanning line apart from said one scanning line by predetermined number of lines is selected, changes the predetermined voltage by a predetermined value or holds the predetermined voltage; and when said one scanning line is selected; and a data-line driving circuit.

摘要翻译： 电光装置的驱动电路包括：多条扫描线; 多条数据线; 第一和第二电容器线; 公共电极; 像素，每个像素包括：像素开关元件; 像素电容器; 和存储电容器; 扫描线驱动电路; 以及电容线驱动电路，当选择所述一条扫描线时，将对应于一条扫描线的第一（或第二）电容线的电压移动到预定电压，并且当扫描线与所述一条扫描线相隔预定数量 选择线路，将预定电压改变预定值或保持预定电压; 并且当选择所述一条扫描线时; 和数据线驱动电路。

公开(公告)号：US20130258223A1

公开(公告)日：2013-10-03

申请号：US13789925

申请日：2013-03-08

申请人： Yukio TANAKA ,  Kenji Nakao ,  Daiichi Suzuki

发明人： Yukio TANAKA ,  Kenji Nakao ,  Daiichi Suzuki

IPC分类号： G02F1/133

CPC分类号： G02F1/13306 ,  G02F1/136213 ,  G02F1/136227 ,  G09G3/3614 ,  G09G3/3655 ,  G09G2300/0876

摘要： According to one embodiment, an apparatus includes an array substrate including gate lines and auxiliary capacitance lines extending along a row, signal lines extending along a column, a semiconductor that intersects the gate line via an insulating layer and confronts the auxiliary capacitance line, a contact electrode for electrically connecting the semiconductor to the pixel electrode, a counter substrate, and a liquid crystal layer sandwiched between the substrates. In the pixels disposed side by side in a direction where the gate line extends, the positions of center of gravity of openings surrounded by the gate lines, the signal lines, the auxiliary capacitance line, and ends of the contact electrode are the same in a direction where the signal line extends.

摘要翻译： 根据一个实施例，一种装置包括阵列基板，其包括沿行延伸的栅极线和辅助电容线，沿着列延伸的信号线，经由绝缘层与栅极线相交并且面对辅助电容线的半导体， 用于将半导体电连接到像素电极的电极，对置基板和夹在基板之间的液晶层。 在栅极线延伸的方向并排设置的像素中，由栅极线，信号线，辅助电容线以及接触电极的端部围绕的开口的重心位置在a 信号线延伸的方向。

公开(公告)号：US20130257846A1

公开(公告)日：2013-10-03

申请号：US13993922

申请日：2011-12-12

申请人： Eiji Matsuda ,  Yasushi Sasaki ,  Yuhichiroh Murakami ,  Seijirou Gyouten ,  Shuji Nishi ,  Makoto Yokoyama

发明人： Eiji Matsuda ,  Yasushi Sasaki ,  Yuhichiroh Murakami ,  Seijirou Gyouten ,  Shuji Nishi ,  Makoto Yokoyama

IPC分类号： G09G3/36

CPC分类号： G09G3/3618 ,  G09G3/3648 ,  G09G2300/0852 ,  G09G2300/0857 ,  G09G2300/0876

摘要： A memory-type liquid crystal display device includes transistors (N1, N2), retention electrodes (MRY), refresh output control sections (RS1), and capacitors (Cb1). In a data retention period, an electric potential of each of the retention electrodes (MRY) is changed via a corresponding one of the capacitors (Cb1) by changing an electric potential level of a retention capacitor wire signal that is supplied to a corresponding CS line (CSL(i)). Each of the refresh output control sections (RS1) receives the electric potential thus changed of a corresponding one of the retention electrodes (MRY) via the input section and controls an electric potential of a corresponding pixel electrode (PIX) in accordance with the electric potential thus changed.

摘要翻译： 记忆型液晶显示装置包括晶体管（N1，N2），保持电极（MRY），刷新输出控制部分（RS1）和电容器（Cb1）。 在数据保持期间，通过改变提供给相应的CS行的保持电容配线信号的电位电平，经由相应的一个电容器（Cb1）来改变每个保持电极（MRY）的电位 （CSL（i））。 每个刷新输出控制部分（RS1）经由输入部分接收相应的一个保持电极（MRY）所改变的电位，并根据电位控制对应的像素电极（PIX）的电位 从而改变了。

公开(公告)号：US20130250198A1

公开(公告)日：2013-09-26

申请号：US13890509

申请日：2013-05-09

申请人： SHARP KABUSHIKI KAISHA

发明人： Fumikazu SHIMOSHIKIRYOH ,  Toshihide TSUBATA ,  Masanori TAKEUCHI ,  Masae KITAYAMA ,  Ikumi ITSUMI ,  Akihiro SHOHRAKU

IPC分类号： G02F1/1362

CPC分类号： G02F1/136213 ,  G02F2001/134345 ,  G09G3/3648 ,  G09G3/3659 ,  G09G2300/0443 ,  G09G2300/0447 ,  G09G2300/0876 ,  G09G2320/0233 ,  G09G2320/028

摘要： A liquid crystal display device according to the present invention includes: a plurality of pixels that are arranged in rows and columns so as to form a matrix pattern; and TFTs (TFT-A, TFT-B and TFT-C), source bus lines, gate bus lines and CS bus lines (CS-A and CS-B), which are associated with the respective pixels. Each pixel includes at least three subpixels (SP-A, SP-B and SP-C) with liquid crystal capacitors that are able to retain mutually different voltages. By supplying a signal (CS-A or CS-B) that makes two of the at least three subpixels display mutually different luminances at least at a certain grayscale tone from the source, gate and CS bus lines to each pixel, the at least three subpixels are able to display mutually different luminances.

摘要翻译： 根据本发明的液晶显示装置包括：排列成行和列以形成矩阵图案的多个像素; 和TFT（TFT-A，TFT-B和TFT-C），源极总线，栅极总线和CS总线（CS-A和CS-B）。 每个像素包括具有能够保持相互不同电压的液晶电容器的至少三个子像素（SP-A，SP-B和SP-C）。 通过提供使至少三个子像素中的两个至少以来自源，栅极和CS总线的某一灰度色调显示相互不同的亮度到每个像素的信号（CS-A或CS-B），至少三个 子像素能够显示相互不同的亮度。

公开(公告)号：US08536937B2

公开(公告)日：2013-09-17

申请号：US13784876

申请日：2013-03-05

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Hajime Kimura ,  Yasuko Watanabe

IPC分类号： G06G7/12

CPC分类号： G09G3/3225 ,  G09G3/3648 ,  G09G2300/0833 ,  G09G2300/0876 ,  H01L27/0629 ,  H03F3/45 ,  H03F3/45076 ,  H03F3/45179 ,  H03F2203/45112 ,  H03F2203/45628 ,  H03K19/00384 ,  H03K19/01728

摘要： A transistor has variation in a threshold voltage or mobility due to accumulation of factors such as variation in a gate insulating film which is caused by a difference of a manufacturing process or a substrate to be used and variation in a crystal state of a channel formation region. The present invention provides an electric circuit which is arranged such that both electrodes of a capacitance device can hold a voltage between the gate and the source of a specific transistor. Further, the present invention provides an electric circuit which has a function capable of setting a potential difference between both electrodes of a capacitance device so as to be a threshold voltage of a specific transistor.

公开(公告)号：US08520157B2

公开(公告)日：2013-08-27

申请号：US13062216

申请日：2009-07-16

申请人： Takuya Ohishi

发明人： Takuya Ohishi

IPC分类号： G02F1/1343 ,  G02F1/1345

CPC分类号： G02F1/1345 ,  G02F1/136213 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0447 ,  G09G2300/0876 ,  G09G2320/0223 ,  G09G2320/0233

摘要： When an active area (AA) side of CS trunk wiring groups (BB1, BB2) is viewed as the inner side, a feed portion (F) of at least one auxiliary capacitance bus line (CsL), which is a path for current flow from the active area (AA) to a point of connection on at least one of CS trunk wiring lines (bb) of each of the CS trunk wiring groups (BB1, BB2), is routed from a start point (S) on the active area (AA) side, through a region (R1) on the inner side of the point of connection, and to a region (R2) on the outer side of the point of connection and connected to the point of connection.

摘要翻译： 当CS主干配线组（BB1，BB2）的有源区域（AA）侧被视为内侧时，作为电流的路径的至少一个辅助电容总线（CsL）的馈电部分（F） 从CS活动区域（BB1，BB2）中的每一个CS中继线布线（bb）中的至少一个的有源区域（AA）到连接点从活动的起始点（S）路由 （AA）侧，通过连接点内侧的区域（R1）和连接点的外侧的区域（R2）连接到连接点。