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    CHARGE SHARING TIME DOMAIN FILTER
    91.
    发明申请
    CHARGE SHARING TIME DOMAIN FILTER 有权
    充电共享时域过滤器

    公开(公告)号：US20150381146A1

    公开(公告)日：2015-12-31

    申请号：US14269647

    申请日：2014-05-05

    Applicant: ANALOG DEVICES, INC.

    Inventor： Eric Nestler ,  Jeffrey Venuti ,  Vladimir Zlatkovic ,  Kartik Nanda

    IPC: H03H15/02

    CPC classification number: H03H15/02 ,  G01D5/24 ,  G01R27/2605 ,  G01R31/028 ,  G06F17/14 ,  G06G7/19

    Abstract: An approach to time domain filtering uses a passive charge sharing approach to implement an infinite impulse response filter. Delayed samples of an input signal are stored as charges on capacitors of a first array of capacitors, and delayed samples of the output signal are stored as charges on capacitors of a second array of capacitors. Outputs are determined by passively coupling capacitors of the first and second arrays to one another, and determining the output according to a total charge on the coupled capacitors. In some examples, a gain is applied to the total charge prior to storing the output on the second array of capacitors. In some examples, a charge scaling circuit is applied to the charges stored on the arrays prior to coupling capacitors to form the output.

    Abstract translation: 时域滤波方法采用无源电荷共享方式来实现无限脉冲响应滤波器。 将输入信号的延迟样本作为电荷存储在第一电容器阵列的电容器上，并且输出信号的延迟采样作为电荷存储在第二电容器阵列的电容器上。 输出由第一和第二阵列的电容器彼此无源耦合确定，并根据耦合的电容器上的总电荷来确定输出。 在一些示例中，在将输出存储在第二电容器阵列之前，对总电荷施加增益。 在一些示例中，在耦合电容器之前，将电荷量化电路应用于存储在阵列上的电荷以形成输出。

    CHARGE SHARING ANALOG COMPUTATION CIRCUITRY AND APPLICATIONS
    92.
    发明申请
    CHARGE SHARING ANALOG COMPUTATION CIRCUITRY AND APPLICATIONS 有权
    充电共享模拟计算电路和应用

    公开(公告)号：US20140233773A1

    公开(公告)日：2014-08-21

    申请号：US14043009

    申请日：2013-10-01

    Applicant: Analog Devices, Inc.

    Inventor： Eric Nestler ,  Vladimir Zlatkovic ,  Jeffrey Venuti

    IPC: H03H7/01 ,  G10K15/00 ,  G06F17/50 ,  H04R25/00 ,  H03M1/12 ,  H02M1/14

    CPC classification number: H03H7/0138 ,  G06F17/5063 ,  G10K15/00 ,  H02M1/14 ,  H03H15/00 ,  H03H15/02 ,  H03M1/12 ,  H04R25/00

    Abstract: In one aspect, reduced power consumption and/or circuit area of a discrete time analog signal processing module is achieved in an approach that makes use of entirely, or largely, passive charge sharing circuitry, which may include configurable (e.g., after fabrication, at runtime) multiplicative scaling stages that do not require active devices in the signal path. In some examples, multiplicative coefficients are represented digitally, and are transformed to configure the reconfigurable circuitry to achieve a linear relationship between a desired coefficient and a degree of charge transfer. In some examples, multiple successive charge sharing phases are used to achieve a desired multiplicative effect that provides a large dynamic range of coefficients without requiring a commensurate range of sizes of capacitive elements. The scaling circuits can be combined to form configurable time domain or frequency domain filters.

    Abstract translation: 在一个方面，离散时间模拟信号处理模块的降低的功耗和/或电路面积是通过使用完全或很大程度上被动电荷共享电路的方法实现的，其中可能包括可配置（例如，在制造之后，在 运行时）乘法缩放阶段，不需要信号路径中的有源设备。 在一些示例中，乘法系数被数字地表示，并且被变换以配置可重构电路以实现期望系数和电荷转移程度之间的线性关系。 在一些示例中，使用多个连续的电荷共享阶段来实现期望的乘法效应，其提供大的动态范围的系数，而不需要电容元件尺寸的相应范围。 缩放电路可以组合以形成可配置的时域或频域滤波器。

    Configurable Filter Using a Transmission Line as a Delay Line
    93.
    发明申请
    Configurable Filter Using a Transmission Line as a Delay Line 有权
    使用传输线作为延迟线的可配置滤波器

    公开(公告)号：US20120173601A1

    公开(公告)日：2012-07-05

    申请号：US13412446

    申请日：2012-03-05

    Applicant: Ahmadreza Rofougaran ,  Maryam Rofougaran

    Inventor： Ahmadreza Rofougaran ,  Maryam Rofougaran

    IPC: G06F17/10

    CPC classification number: H01P9/00 ,  H01L23/66 ,  H01L2223/6677 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/0002 ,  H01L2924/15321 ,  H01L2924/19105 ,  H03H15/02 ,  H01L2924/00

    Abstract: Methods and systems for a configurable finite impulse response (FIR) filter using a transmission line as a delay line are disclosed and may include selectively coupling one or more taps of a multi-tap transmission line to configure delays for one or more finite impulse response (FIR) filters to enable transmission and/or reception of signals. The delays may be configured based on a location of the one or more selectively coupled taps on the multi-tap transmission line. The FIR filters, which may include one or more stages, may be impedance matched to the selectively coupled taps. The multi-tap transmission line may be integrated on the chip, or a package to which the chip is coupled. The multi-tap transmission line may include a microstrip structure or a coplanar waveguide structure, and may include ferromagnetic material. The distortion of signals in the chip may be compensated utilizing the FIR filters.

    Abstract translation: 公开了使用传输线作为延迟线的可配置有限脉冲响应（FIR）滤波器的方法和系统，并且可以包括选择性地耦合多抽头传输线的一个或多个抽头以配置一个或多个有限脉冲响应的延迟（ FIR）滤波器以实现信号的发送和/或接收。 可以基于多抽头传输线上的一个或多个选择性耦合抽头的位置来配置延迟。 可以包括一个或多个级的FIR滤波器可以与选择性耦合的抽头阻抗匹配。 多抽头传输线可以集成在芯片上，或者与芯片耦合到的封装上。 多抽头传输线可以包括微带结构或共面波导结构，并且可以包括铁磁材料。 可以利用FIR滤波器来补偿芯片中信号的失真。

    Dense-tap transversal filter with elementary coefficients
    95.
    发明授权
    Dense-tap transversal filter with elementary coefficients 有权
    具有基本系数的密集抽头横向滤波器

    公开(公告)号：US07760829B2

    公开(公告)日：2010-07-20

    申请号：US11414225

    申请日：2006-05-01

    Applicant: Brian Machesney

    Inventor： Brian Machesney

    IPC: H04B1/10 ,  H03D3/24

    CPC classification number: H03H15/02 ,  H04L25/03038 ,  H04L25/03057

    Abstract: A signal processing method and device are provided to perform an arbitrary signal processing or filtering function on a continuous time signal. An input continuous time signal is successively delayed by a plurality of delay elements to produce a plurality of delayed signals. A corresponding coefficient is applied to some or all of the plurality of delayed signals to produce a plurality of weighted signals. The plurality of weighted signals are combined to produce a processed output signal. The coefficients applied to some or all of the delayed signals are set to values so as to perform a desired signal filtering or processing function of the input continuous time signal in producing the processed output signal.

    Abstract translation: 提供信号处理方法和装置以对连续时间信号执行任意信号处理或滤波功能。 输入连续时间信号由多个延迟元件连续延迟以产生多个延迟信号。 相应的系数被施加到多个延迟信号中的一些或全部以产生多个加权信号。 多个加权信号被组合以产生经处理的输出信号。 应用于一些或所有延迟信号的系数被设置为值，以便在产生经处理的输出信号时执行输入的连续时间信号的期望的信号滤波或处理功能。

    Distributed amplifier with built-in filtering functions
    96.
    发明授权
    Distributed amplifier with built-in filtering functions 有权
    具有内置滤波功能的分布式放大器

    公开(公告)号：US07498883B2

    公开(公告)日：2009-03-03

    申请号：US11544937

    申请日：2006-10-10

    Applicant: Hui Wu ,  Yunliang Zhu

    Inventor： Hui Wu ,  Yunliang Zhu

    IPC: H03F3/60

    CPC classification number: H03F3/602 ,  H03F3/607 ,  H03F2200/168 ,  H03F2200/451 ,  H03H15/02

    Abstract: A distributed amplifier uses non-uniform filtering structures to provide better control over pass-band and stop-band characteristics. The various sections can have different tap coefficients. A notch filter can be implemented for interference suppression or pulse shaping in an ultra-wideband transceiver.

    Abstract translation: 分布式放大器使用非均匀滤波结构来提供对通带和阻带特性的更好控制。 各个部分可以具有不同的抽头系数。 可以实现陷波滤波器用于超宽带收发器中的干扰抑制或脉冲整形。

    Distributed amplifier with built-in filtering functions
    97.
    发明申请
    Distributed amplifier with built-in filtering functions 有权
    具有内置滤波功能的分布式放大器

    公开(公告)号：US20070182481A1

    公开(公告)日：2007-08-09

    申请号：US11544937

    申请日：2006-10-10

    Applicant: Hui Wu ,  Yunliang Zhu

    Inventor： Hui Wu ,  Yunliang Zhu

    IPC: H03F3/60

    CPC classification number: H03F3/602 ,  H03F3/607 ,  H03F2200/168 ,  H03F2200/451 ,  H03H15/02

    Abstract: A distributed amplifier uses non-uniform filtering structures to provide better control over pass-band and stop-band characteristics. The various sections can have different tap coefficients. A notch filter can be implemented for interference suppression or pulse shaping in an ultra-wideband transceiver.

    Abstract translation: 分布式放大器使用非均匀滤波结构来提供对通带和阻带特性的更好控制。 各个部分可以具有不同的抽头系数。 可以实现陷波滤波器用于超宽带收发器中的干扰抑制或脉冲整形。

    Analog filter suitable for smoothing a ΔΣ-modulated signal
    99.
    发明授权
    Analog filter suitable for smoothing a ΔΣ-modulated signal 失效
    适用于平滑DeltaSigma调制信号的模拟滤波器

    公开(公告)号：US07085799B2

    公开(公告)日：2006-08-01

    申请号：US10203004

    申请日：2001-12-06

    Applicant: Yukio Koyanagi

    Inventor： Yukio Koyanagi

    IPC: G06G7/02

    CPC classification number: H03H15/02

    Abstract: An analog filter includes a first arithmetic operation section 2-1 having a plurality of sets of processing circuit being cascade connected, each processing circuit having an S/H circuit of plural stages for holding a ΔΣ-modulated signal and an analog adder for adding the input and output signals of the S/H circuit, in which the number of stages of the S/H circuits 11-1, 14-1, 17-1 and 20-1 decreases toward the end of cascade connection, and a second arithmetic operation section 2-2 configured in the same way, which are cascade connected. By using such an analog filter, over sampling and convolution of a ΔΣ-modulated signal are conducted so that the envelope of the filter output may be a quadratic curve of finite carrier that converges to zero at finite sampling points to prevent phase distortion of an LPF and a discretization error due to a conventional function. Compared with a conventional circuit for over-sampling and convolution, the number of stages of the S/H circuits and the number of adders are small.

    Abstract translation: 模拟滤波器包括具有串联连接的多组处理电路的第一算术运算部分2 <1>，每个处理电路具有用于保持ΔΣ调制信号的多级S / H电路 以及模拟加法器，用于将S / H电路的输入和输出信号相加，其中S / H电路11 SUB-1，14-SUB的次数，17 和20 SUB-1 降低到级联连接的结束，并且第二算术运算部分2 相同的方式，它们是级联的。 通过使用这种模拟滤波器，进行DeltaSigma调制信号的过采样和卷积，使得滤波器输出的包络可以是在有限采样点收敛到零的有限载波的二次曲线，以防止LPF的相位失真 以及由常规功能引起的离散化误差。 与用于过采样和卷积的常规电路相比，S / H电路的级数和加法器的数量小。

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