Load compensation to reduce deterministic jitter in clock applications

    公开(公告)号:US10778230B2

    公开(公告)日:2020-09-15

    申请号:US16661049

    申请日:2019-10-23

    IPC分类号: H03K23/66 H03K21/02

    摘要: A method for reducing deterministic jitter in a clock generator includes providing a load current through a regulated voltage node to a circuit responsive to a divide ratio. The method includes providing an auxiliary current through the regulated voltage node. The auxiliary current has a first current level during a first period corresponding to a first value of the divide ratio and the auxiliary current has a second current level during a second period corresponding to a second value of the divide ratio.

    System and method of crystal oscillator temperature compensation for operation in extended temperature range

    公开(公告)号:US10763781B2

    公开(公告)日:2020-09-01

    申请号:US16023001

    申请日:2018-06-29

    IPC分类号: H03B5/04 H03B5/36

    摘要: A system and method of performing temperature compensation based on temperature of a crystal. An integrated circuit includes a clock circuit, a memory, an interface developing a sense voltage indicative of a temperature of the crystal, and a controller. The memory stores compensation values including nominal values based on a nominal third order polynomial that defines a nominal frequency versus temperature relationship of a crystal design representing multiple crystals, and a pair of adjustment values derived from two temperature-frequency error points. The controller determines a temperature value based on the sense voltage, calculates a frequency offset using the temperature value and the compensation values to solve a compensated third order polynomial defining a compensated frequency versus temperature relationship of the crystal, and adjusts a clock signal of the clock circuit using the frequency offset. A Wi-Fi device may be optimized for industrial IoT operating within an extended temperature range.

    Low power heartbeat for low power mode

    公开(公告)号:US10756823B2

    公开(公告)日:2020-08-25

    申请号:US15975307

    申请日:2018-05-09

    摘要: A first die is communicatively coupled to a first isolation communication channel and a second isolation communication channel and configured to send a first heartbeat signal over the first isolation communication channel. A second die is coupled to receive the first heartbeat signal from the first die over the first isolation communication channel and to supply a second heartbeat signal to the second isolation communication channel. The first die enters a first die low power mode responsive to detecting an absence of the second heartbeat signal and the second die enters a second die low power mode responsive to detecting an absence of the first heartbeat signal. The first and second die use low power oscillators in the low power mode to supply the heartbeat signals.

    State retention circuit that retains data storage element state during power reduction mode

    公开(公告)号:US10742199B2

    公开(公告)日:2020-08-11

    申请号:US16416462

    申请日:2019-05-20

    摘要: A semiconductor device that retains a state of a data storage element during a power reduction mode including supply rails and voltages, and a storage latch and a retention latch both powered by retention supply voltage that remains energized during a power reduction mode. The storage latch and the retention latch are both coupled to a retention node that is toggled between first and second states before entering the power reduction mode. The toggling causes the storage latch to latch the state of the data storage element during the normal mode, and the retention node enables the storage element to hold the state during the power reduction mode. The retention latch includes a retention transistor and a retention inverter powered by the retention supply voltage. The retention inverter keeps the retention transistor turned on and the retention transistor holds the state of the retention node during the power reduction mode.

    System and method of operating automatic gain control in the presence of high peak-to-average ratio blockers

    公开(公告)号:US10742185B1

    公开(公告)日:2020-08-11

    申请号:US16367908

    申请日:2019-03-28

    摘要: A wireless receiver including a gain network that adjusts a gain of a received wireless signal and provides an RF signal, a level detector that provides a level indication while a strength of the RF signal is at least an RF level threshold, a timing system that provides a timing value indicative of a total amount of time that the level indication is provided during a timing window, a gain up disable circuit that provides a gain up disable signal when the timing value reaches a low threshold, a blocker strength detect circuit that provides a gain down request signal when the timing value reaches a high threshold, and an AGC circuit that does not increase the gain of the gain network while the gain up disable signal is provided, and that allows a reduction of the gain of the gain network while the gain down request signal is provided.

    System and method for secure wakeup in a communication system

    公开(公告)号:US10740498B2

    公开(公告)日:2020-08-11

    申请号:US15888415

    申请日:2018-02-05

    发明人: Sriram Mudulodu

    摘要: The present invention relates to a method and system of secure wakeup in a communication system. The method comprises: transmitting a predetermined wakeup code by a wakeup transmitter of a first node to a wakeup receiver of a second node using a first communication link; establishing a protocol for future wakeup codes periodically between the first node and the second node using a second communication link; wherein the wakeup code is updated based on at least one of: the protocol for future wakeup codes, a first function of time defined by protocol for future wakeup codes, a second function of number of wakeups defined by protocol for future wakeup codes; comparing the wakeup code received by the second node with the wakeup code sent by the first node; and if the wakeup code received by the second node matches a template wakeup code derived from a protocol for future wakeup codes, then the receiver wakes up; otherwise the receiver does not wakeup.

    Simultaneous control of a group in a mesh network

    公开(公告)号:US10735913B2

    公开(公告)日:2020-08-04

    申请号:US16127691

    申请日:2018-09-11

    IPC分类号: H04W4/06 H04L12/18 H04W84/18

    摘要: A system and method for transmitting packets to a plurality of network devices that cannot be accessed via a single hop. The system includes a source, which issues a multicast message to those network devices in close proximity, and also transmits an encapsulated multicast message to a distribution node. This encapsulated multicast message may be routed using traditional routing protocols. The distribution node then transmits the multicast message to those network devices within close proximity. The distribution node may also have the ability to transmit singlecast messages to those network devices, if necessary, to perform retries.

    Charge pump system with electromagnetic interference mitigation

    公开(公告)号:US10734894B1

    公开(公告)日:2020-08-04

    申请号:US16547107

    申请日:2019-08-21

    摘要: A charge pump system including charge pump circuitry, a charge pump controller, and current limit circuitry. The charge pump circuitry has an input coupled to a supply input node and has an output for developing a drive voltage. The charge pump controller controls the charge pump circuitry to increase the drive voltage above a supply voltage provided to the supply input node. The current limit circuitry limits current through the charge pump circuitry to a limited current level that is less than a maximum current level during a current limit mode to reduce current spikes at the nodes of the charge pump system that may generate EMI. A current mirror may be used as the current limit circuitry to directly limit current through switches of the charge pump circuitry. The timing of the charge pump switches may also be modified such as inserting strategic delays to reduce the current spikes.

    Reference clock frequency change handling in a phase-locked loop

    公开(公告)号:US10727844B1

    公开(公告)日:2020-07-28

    申请号:US16427826

    申请日:2019-05-31

    IPC分类号: H03L1/02 H03L7/093 H03K5/26

    摘要: A method for operating a phase-locked loop includes generating a phase difference signal based on an input clock signal and a feedback clock signal. The method includes filtering a loop filter input signal based on the phase difference signal to generate a loop filter output signal. The feedback clock signal is based on the loop filter output signal. The method includes transitioning a frequency of an output clock signal of the phase-locked loop from a first frequency to a target frequency responsive to detection of a catastrophic cycle slip event in the absence of an out-of-frequency event.

    Transceiver with frequency error compensation

    公开(公告)号:US10720948B2

    公开(公告)日:2020-07-21

    申请号:US16410055

    申请日:2019-05-13

    摘要: A method for operating a communications system includes transmitting a preamble sequence including a plurality of tones. Each tone of the plurality of tones has a first characteristic and a second characteristic. The first characteristic of each of the tones of the plurality of tones has a predetermined relative relationship to the first characteristic of each of the other tones of the plurality of tones and the second characteristic of each of the tones of the plurality of tones has a predetermined relative relationship to the second characteristic of each of the other tones of the plurality of tones. The first and second characteristics may include relative power and relative phase.