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    NONVOLATILE MEMORY DEVICE AND ERASING METHOD
    101.
    发明申请
    NONVOLATILE MEMORY DEVICE AND ERASING METHOD 审中-公开
    非易失性存储器件和擦除方法

    公开(公告)号：US20090010071A1

    公开(公告)日：2009-01-08

    申请号：US12164226

    申请日：2008-06-30

    Applicant: Seung-Won LEE

    Inventor： Seung-Won LEE

    IPC: G11C16/16

    CPC classification number: G11C16/16

    Abstract: Disclosed is an erasing method for a nonvolatile memory device that includes erasing selected memory cells and erase-verifying the selected memory cells after increasing their threshold voltage by application of a negative bulk bias voltage.

    Abstract translation: 公开了一种用于非易失性存储器件的擦除方法，其包括通过施加负体积偏置电压来增加所选择的存储器单元并且在增加其阈值电压之后对所选存储单元进行擦除验证。

    Hacking Detector Circuit For Semiconductor Integrated Circuit and Detecting Method Thereof
    102.
    发明申请
    Hacking Detector Circuit For Semiconductor Integrated Circuit and Detecting Method Thereof 有权
    用于半导体集成电路的黑客检测器电路及其检测方法

    公开(公告)号：US20080309396A1

    公开(公告)日：2008-12-18

    申请号：US12132249

    申请日：2008-06-03

    Applicant: Seung-Won Lee

    Inventor： Seung-Won Lee

    IPC: G06K19/00 ,  G01N27/00

    CPC classification number: G06K19/07372 ,  G06F21/73

    Abstract: Disclosed is a semiconductor integrated circuit which includes a pre-charge capacitor connected to a check node pre-charged. A sense capacitor is configured to discharge the check node. A detector is configured to detect whether the sense capacitor is exposed, based upon a voltage of the check node after a predetermined length of time has elapses.

    Abstract translation: 公开了一种半导体集成电路，其包括连接到预充电的校验节点的预充电电容器。 感测电容器被配置为放电校验节点。 检测器被配置为基于在经过预定时间长度之后的校验节点的电压来检测感测电容器是否被暴露。

    Flash Memory Device and Writing Method Thereof
    103.
    发明申请
    Flash Memory Device and Writing Method Thereof 有权
    闪存设备及其写入方法

    公开(公告)号：US20080175056A1

    公开(公告)日：2008-07-24

    申请号：US11769334

    申请日：2007-06-27

    Applicant: Seung-Won Lee

    Inventor： Seung-Won Lee

    IPC: G11C16/04 ,  G11C16/06

    CPC classification number: G11C16/24 ,  G11C16/04 ,  G11C16/10 ,  G11C16/30 ,  G11C29/12 ,  G11C29/12005 ,  G11C2029/1204 ,  G11C2029/1802

    Abstract: A flash memory device includes a memory cell array including a plurality of memory cells. A data writing buffer temporarily stores data to be written into the memory cells. A control circuit controls a write operation of the memory cells. A decoder decodes write address of the memory cell in response to the control circuit and regulating a constant current to flow through a selected bit line with reference to a result of the decoding. The decoder decodes an address and controls a current in units of a memory cell during a normal writing mode and decodes an address and controls a current in units of a memory block during a test writing mode.

    Abstract translation: 闪存器件包括包括多个存储单元的存储单元阵列。 数据写入缓冲器临时存储要写入存储单元的数据。 控制电路控制存储单元的写操作。 解码器响应于控制电路对存储器单元的写入地址进行解码，并参照解码结果调节恒定电流流过所选位线。 解码器解码地址并且在正常写入模式期间以存储单元为单位控制电流，并且在测试写入模式期间解码地址并以存储块为单位控制电流。

    DELAY-LOCKED LOOP CIRCUIT AND METHOD OF GENERATING MULTIPLIED CLOCK THEREFROM
    104.
    发明申请
    DELAY-LOCKED LOOP CIRCUIT AND METHOD OF GENERATING MULTIPLIED CLOCK THEREFROM 失效
    延迟环路电路及其生成多个时钟的方法

    公开(公告)号：US20080116950A1

    公开(公告)日：2008-05-22

    申请号：US11877187

    申请日：2007-10-23

    Applicant: Seung-Hwan Baek ,  Seung-Won Lee

    Inventor： Seung-Hwan Baek ,  Seung-Won Lee

    IPC: H03L7/06

    CPC classification number: H03L7/0812 ,  H03L7/0891 ,  H03L7/113 ,  H03L7/16

    Abstract: A delay-locked loop circuit includes: a phase detector generating a detection signal from a phase difference between an external clock signal and a feedback clock signal; a charge pump controlling a level of a voltage signal in response to the detection signal; and a voltage-controlled delay line generating a plurality of delay clock signals by delaying the external clock signal in response to the voltage signal and generating a multiplied clock signal using the delay clock signals in different numbers in accordance with a frequency domain of the external clock signal. The multiplied clock signal is generated by multiplying the external clock signal an integer number of times and the feedback clock signal is delayed from the plurality of delay clock signals by a cycle period of the external clock signal.

    Abstract translation: 延迟锁定环路电路包括：相位检测器，从外部时钟信号和反馈时钟信号之间的相位差产生检测信号; 电荷泵，响应于检测信号控制电压信号的电平; 以及电压控制延迟线，通过响应于电压信号延迟外部时钟信号并且根据外部时钟的频域使用不同数量的延迟时钟信号产生倍增时钟信号来产生多个延迟时钟信号 信号。 乘法时钟信号通过将外部时钟信号乘以整数倍而产生，反馈时钟信号从多个延迟时钟信号延迟外部时钟信号的周期。

    Semiconductor monolithic integrated optical transmitter
    105.
    发明授权
    Semiconductor monolithic integrated optical transmitter 失效
    半导体单片集成光发射机

    公开(公告)号：US07245644B2

    公开(公告)日：2007-07-17

    申请号：US10716653

    申请日：2003-11-19

    Applicant: Byung-Kwon Kang ,  Shi-Yun Cho ,  In Kim ,  Do-Young Rhee ,  Tae-Il Kim ,  Dong-Hoon Jang ,  Seung-Won Lee ,  Duk-Ho Jeon ,  June-Hyeon Ahn ,  Young-Min Lee ,  Jong-Ryeol Kim

    Inventor： Byung-Kwon Kang ,  Shi-Yun Cho ,  In Kim ,  Do-Young Rhee ,  Tae-Il Kim ,  Dong-Hoon Jang ,  Seung-Won Lee ,  Duk-Ho Jeon ,  June-Hyeon Ahn ,  Young-Min Lee ,  Jong-Ryeol Kim

    IPC: H01S5/00

    CPC classification number: H01S5/026 ,  H01S5/0265

    Abstract: A semiconductor monolithic integrated optical transmitter including a plurality of active layers formed on a semiconductor substrate is disclosed, which comprises: a distributed feedback laser diode including a grating for reflecting light with a predetermined wavelength and a first active layer for oscillating received light from the grating; an electro-absorption modulator including a second active layer for receiving light from the first active layer, wherein the received light intensity is modulated through a change of absorbency in accordance with an applied voltage; an optical amplifier including a third active layer for amplifying received light from the second active layer; a first optical attenuator between the first active layer and the second active layer; and a second optical attenuator between the second active layer and the third active layer.

    Abstract translation: 公开了一种包括形成在半导体衬底上的多个有源层的半导体单片集成光发射器，其包括：分布反馈激光二极管，包括用于反射具有预定波长的光的光栅和用于振荡来自光栅的接收光的第一有源层 ; 一种电吸收调制器，包括用于接收来自第一有源层的光的第二有源层，其中根据施加的电压通过吸收变化改变接收的光强度; 光放大器，包括用于放大来自第二有源层的接收光的第三有源层; 第一有源层和第二有源层之间的第一光衰减器; 以及在第二有源层和第三有源层之间的第二光衰减器。

    Bias voltage generator with auto trimming function
    106.
    发明申请
    Bias voltage generator with auto trimming function 审中-公开
    偏置电压发生器具有自动修整功能

    公开(公告)号：US20060273846A1

    公开(公告)日：2006-12-07

    申请号：US11409324

    申请日：2006-04-21

    Applicant: Seung-Won Lee

    Inventor： Seung-Won Lee

    IPC: G05F1/10

    CPC classification number: G11C5/147 ,  G11C29/02 ,  G11C29/021 ,  G11C29/028

    Abstract: An automatic trimming bias voltage generator that does not require a test mode to trim a bias voltage, and allows the bias voltage to be automatically trimmed in a plurality of operating voltage regions without adding elements to the layout. The automatic trimming bias voltage generator includes a reference bias voltage generation circuit generating a reference bias voltage; a bias voltage generation circuit, that generates a bias voltage which is automatically trimmed using the reference bias voltage as a reference voltage, a voltage comparing circuit, and a decoder. The voltage comparing circuit compares the reference bias voltage with a bias voltage output from a bias voltage generation circuit. The decoder receives and decodes a comparison signal from the voltage comparing circuit, and applies trimming information for the bias voltage obtained as the decoding result to the bias voltage generation circuit.

    Abstract translation: 一种自动微调偏置电压发生器，其不需要测试模式来修整偏置电压，并且允许在多个工作电压区域中自动修整偏置电压，而不向该布局添加元件。 自动微调偏置电压发生器包括产生参考偏置电压的参考偏置电压产生电路; 偏置电压产生电路，其产生使用参考偏置电压作为参考电压自动修整的偏置电压，电压比较电路和解码器。 电压比较电路将参考偏置电压与偏置电压产生电路输出的偏置电压进行比较。 解码器接收并解码来自电压比较电路的比较信号，并将作为解码结果获得的偏置电压的修整信息应用于偏置电压产生电路。

    Charging a battery using constant voltage and pulse
    107.
    发明授权
    Charging a battery using constant voltage and pulse 有权
    使用恒定电压和脉冲为电池充电

    公开(公告)号：US06788028B2

    公开(公告)日：2004-09-07

    申请号：US10324753

    申请日：2002-12-19

    Applicant: Seung-Won Lee

    Inventor： Seung-Won Lee

    IPC: H02J704

    CPC classification number: H02J7/008 ,  H02J7/0027

    Abstract: The present invention provides a battery charger of mobile phone capable of charging a battery rapidly and fully, by charging the battery rapidly with pulse up to a predetermined level of the charging capacity of the battery, and then by charging with constant voltage until the battery is fully charged, and a charging method for the same; the battery charger comprising: a main control means, which controls pulse voltage charging and constant voltage charging based on the charging state of the battery; a constant voltage charging control means, which controls charging of the battery with constant voltage under control of the above main control means; a pulse charging control means, which detects charging voltage of the battery and controls charging of the battery with pulse voltage based on the detected charging voltage under control of the above main control means; and a charging means, which charges the battery by outputting pulse voltage or constant voltage after DC power has been applied under control of the above pulse charging control means or the above constant voltage charging control means.

    Abstract translation: 本发明提供了一种手机电池充电器，其能够快速且全面地对电池充电，通过以电池快速充电至电池的充电容量的预定水平，然后通过以恒定电压充电直到电池充电 充电，充电方法; 所述电池充电器包括：主控制装置，其基于所述电池的充电状态来控制脉冲电压充电和恒定电压充电; 恒压充电控制装置，其在上述主控制装置的控制下控制具有恒定电压的电池的充电; 脉冲充电控制装置，其在上述主控制装置的控制下，基于检测到的充电电压来检测电池的充电电压并控制具有脉冲电压的电池的充电; 以及充电装置，其通过在上述脉冲充电控制装置或上述恒压充电控制装置的控制下施加直流电力之后通过输出脉冲电压或恒定电压对电池充电。

    Storage apparatus for improving food preservation
    109.
    发明授权
    Storage apparatus for improving food preservation 有权
    用于改善食物保鲜的储存装置

    公开(公告)号：US09451788B2

    公开(公告)日：2016-09-27

    申请号：US14361200

    申请日：2013-03-06

    Applicant: Seung Won Lee

    Inventor： Seung Won Lee

    IPC: A23C3/07 ,  A23L3/00 ,  A23L3/26 ,  A23B7/015

    CPC classification number: A23L3/26 ,  A23B7/015 ,  Y02A40/924

    Abstract: Disclosed a preservation apparatus for improving food storage performance, in which an illumination unit to irradiate light having a specific wavelength is installed on an inner wall surface of a box having foods stored therein to increase the storage period of the foods when the foods are transferred at a room temperature or stored at a low temperature. The foods are prevented from being decayed for a long time, and the nutrients and the freshness of the foods are maintained. The box having the foods stored therein and the illumination unit installed in the box to irradiate light having the specific wavelength onto the foods stored in the box are included.

    Abstract translation: 公开了一种用于改善食品储存性能的保存装置，其中照射具有特定波长的光的照明单元安装在其中存储有食物的盒的内壁表面上，以增加当食物被转印时的食物的储存期 室温或低温储存。 防止食物长时间腐烂，维持食物的营养和新鲜度。 包括存储在其中的食物的盒子和安装在盒子中的照明单元以将具有特定波长的光照射到存储在盒子中的食物上。

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