公开(公告)号：US20120289128A1

公开(公告)日：2012-11-15

申请号：US13105874

申请日：2011-05-11

申请人： Li-Chung Liu ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Li-Chung Liu ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： B24B7/04

CPC分类号： H01L21/67219 ,  B24B37/107 ,  B24B57/02 ,  H01L21/02052 ,  H01L21/67046

摘要： A chemical mechanical polishing (CMP) system includes a wafer polishing unit comprising a waste liquid sink for receiving a used slurry and a waste slurry drain piping for draining the used slurry; and a post-CMP cleaning unit coupled to the wafer polishing unit such that a used base chemical such as tetramethyl ammonium hydroxide (TMAH) produced from the post-CMP cleaning unit flows toward the wafer polishing unit to frequently wash at least the waste slurry drain piping in a real time fashion on a wafer by wafer basis.

摘要翻译： 化学机械抛光（CMP）系统包括晶片抛光单元，其包括用于接收使用过的浆料的废液槽和用于排出所用浆料的废浆排放管道; 以及与CMP晶片抛光单元联接的后CMP清洁单元，使得由CMP后清洁单元生产的诸如四甲基氢氧化铵（TMAH）的使用的基础化学品流向晶片抛光单元，以至少频繁地洗涤废料排水 以晶圆为基础，以实时的方式在晶圆上进行配管。

公开(公告)号：US20120288966A1

公开(公告)日：2012-11-15

申请号：US13105905

申请日：2011-05-12

申请人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/30 ,  H01L21/306

CPC分类号： H01L21/31133 ,  H01L2224/48091 ,  H01L2924/12044 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method for decapsulating an integrated circuit package in the absence of a mask is disclosed. First, a package is provided. The package includes at least a circuit element and a molding compound enclosing the circuit. Second, a caustic solution is simultaneously provided and drained. The caustic solution is capable of etching the molding compound while in continuous contact with the molding compound to etch the molding compound. As a consequence, the molding compound is removed so that the circuit element in the package is substantially exposed.

摘要翻译： 公开了一种在没有掩模的情况下对集成电路封装进行封装的方法。 首先，提供一个包装。 封装件至少包括电路元件和封装电路的模塑料。 第二，同时提供和排出苛性碱溶液。 苛性溶液能够在与模塑料连续接触的同时刻蚀模塑料以蚀刻模塑料。 结果，除去模塑料，使包装中的电路元件基本上露出。

公开(公告)号：US20120288355A1

公开(公告)日：2012-11-15

申请号：US13105881

申请日：2011-05-11

申请人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Ming-Teng Hsieh ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/677 ,  B65B31/00

CPC分类号： H01L21/67393

摘要： A method for storing wafers is disclosed. A plurality of wafers are placed into the wafer cassette box. The wafer cassette box is hermetically sealed and pumped down to vacuum for the wafer storage. Alternatively, the wafers carried by a holder conveyed on a wafer conveyor are placed into a pump-down chamber enclosing a section of the wafer conveyor. The pump-down chamber is hermetic sealed and pumped down to vacuum for the wafer storage on the wafer conveyor.

摘要翻译： 公开了一种用于存储晶片的方法。 多个晶片被放置在晶片盒盒中。 将晶片盒盒密封并泵送到真空以进行晶片储存。 或者，由在晶片传送器上输送的保持器承载的晶片被放置在包围晶片传送器的一部分的抽空室中。 抽气室被气密密封并泵送到真空以用于在晶片输送机上的晶片储存。

公开(公告)号：US08309459B1

公开(公告)日：2012-11-13

申请号：US13175882

申请日：2011-07-03

申请人： Wen-Chieh Wang ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Wen-Chieh Wang ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/44

CPC分类号： H01L21/76897 ,  H01L29/78 ,  H01L2221/1063

摘要： A semiconductor process is provided. A substrate is provided in an etching apparatus, wherein first conductive patterns, a barrier layer and a patterned insulating layer are formed thereon. The first openings are formed between the first conductive patterns, the barrier layer covers surfaces of the first conductive patterns and the first openings, and the patterned insulating layer is formed on the first conductive patterns and has a plurality of second openings. The second openings expose the barrier layer on top corners of the first conductive patterns. Polymer layers are formed on the barrier layer, wherein a thickness of the polymer layer on the top corners of the first conductive pattern is larger than a thickness of the polymer layer on bottom portions of the first openings. An etching process is performed to remove the polymer layer and the barrier layer disposed on the bottom portions of the first openings.

摘要翻译： 提供半导体工艺。 在蚀刻装置中设置有基板，其中在其上形成第一导电图案，势垒层和图案化绝缘层。 第一开口形成在第一导电图案之间，阻挡层覆盖第一导电图案和第一开口的表面，并且图案化绝缘层形成在第一导电图案上并且具有多个第二开口。 第二开口暴露第一导电图案的顶角上的阻挡层。 聚合物层形成在阻挡层上，其中第一导电图案的顶角上的聚合物层的厚度大于第一开口的底部上的聚合物层的厚度。 执行蚀刻工艺以去除设置在第一开口的底部上的聚合物层和阻挡层。

公开(公告)号：US20120276714A1

公开(公告)日：2012-11-01

申请号：US13096976

申请日：2011-04-28

申请人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/31

CPC分类号： H01L21/02164 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02326 ,  H01L21/76224 ,  H01L21/76227

摘要： A method of oxidizing polysilazane is disclosed, comprising providing a substrate, comprising a trench, forming a polysilazane layer in the trench, and treating the polysilazane layer in an acid containing solution applied with mega-sonic waves to oxidize the polysilazane layer, wherein the acid containing solution comprises phosphoric acid, sulfuric acid, H2SO4 added with O3 (SOM), H2SO4 added with H2O2 (SPM), H3PO4 added with O3, or H3PO4 added with H2O2, and removing the silicon oxide layer outside of the trench.

摘要翻译： 公开了一种氧化聚硅氮烷的方法，其包括提供基底，包括沟槽，在沟槽中形成聚硅氮烷层，以及处理应用大声波的含酸溶液中的聚硅氮烷层以氧化聚硅氮烷层，其中酸 （SOM），加入H 2 O 2（SPM）的H 2 SO 4，添加有O 3的H 3 PO 4或加入H 2 O 2的H 3 PO 4，并除去沟槽外的氧化硅层。

公开(公告)号：US08298939B1

公开(公告)日：2012-10-30

申请号：US13162536

申请日：2011-06-16

申请人： Jar-Ming Ho ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Jar-Ming Ho ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/44

CPC分类号： H01L21/28562 ,  H01L21/76879 ,  H01L21/76895 ,  H01L29/456 ,  H01L29/66628

摘要： A method for fabricating a conductive contact is provided, including: providing a semiconductor substrate with a dielectric layer formed thereover and two conductive regions and an isolation element formed therein, wherein the isolation element isolates the two conductive regions from each other; forming an opening in the dielectric layer, exposing a top surface of the isolation element and a portion of a top surface of each of the conductive regions; performing an epitaxy process and forming a conductive semiconductor layer within the opening, overlying the top surface of the isolation element and the portion of the top surface of each of the conductive regions; and forming a conductive layer in the opening, overlying the conductive semiconductor layer and filling the opening.

摘要翻译： 提供了一种用于制造导电接触的方法，包括：提供半导体衬底，其上形成有介电层和两个导电区域和形成在其中的隔离元件，其中隔离元件将两个导电区域相互隔离; 在所述电介质层中形成开口，暴露所述隔离元件的顶表面和每个所述导电区域的顶表面的一部分; 执行外延工艺并在开口内形成导电半导体层，覆盖隔离元件的顶表面和每个导电区域的顶表面的部分; 以及在所述开口中形成导电层，覆盖所述导电半导体层并填充所述开口。

公开(公告)号：US20120270408A1

公开(公告)日：2012-10-25

申请号：US13093838

申请日：2011-04-25

申请人： Kuo-Hui Su ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Kuo-Hui Su ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/31

CPC分类号： H01L21/28202 ,  H01L29/513 ,  H01L29/518

摘要： A manufacturing method of a gate dielectric layer that includes a nitride layer and an oxide layer is provided. A substrate is provided. A nitridation treatment is performed to form the nitride layer on the substrate. An oxidation treatment is performed subsequent to the formation of the nitride layer to form the oxide layer between the nitride layer and the substrate.

摘要翻译： 提供了包括氮化物层和氧化物层的栅极电介质层的制造方法。 提供基板。 进行氮化处理以在衬底上形成氮化物层。 在形成氮化物层之后进行氧化处理，以在氮化物层和衬底之间形成氧化物层。

公开(公告)号：US20120270394A1

公开(公告)日：2012-10-25

申请号：US13093735

申请日：2011-04-25

申请人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/768

CPC分类号： H01L21/304 ,  H01L21/76898

摘要： A method of bevel trimming a three dimensional (3D) semiconductor device is disclosed, comprising providing a substrate with stack layers thereon and through substrate vias (TSV) therein, wherein an edge of the substrate is curved, performing a bevel trimming step to the curved edge of the substrate for obtaining a planar edge, and thinning the substrate to expose the through substrate vias.

摘要翻译： 公开了一种斜面修整三维（3D）半导体器件的方法，包括提供衬底上的堆叠层，并通过其中的衬底通孔（TSV），其中衬底的边缘是弯曲的，对弯曲的 边缘，用于获得平面边缘，并且使基板变薄以暴露通过的基板通孔。

公开(公告)号：US20120267760A1

公开(公告)日：2012-10-25

申请号：US13093840

申请日：2011-04-25

申请人： Kuo-Hui Su ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Kuo-Hui Su ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L29/92 ,  H01L21/02

CPC分类号： H01L28/75

摘要： A capacitor and a manufacturing method thereof are provided. The capacitor includes a first electrode, a first metal layer, a dielectric layer and a second electrode. The first electrode is disposed on a substrate. The first metal layer is disposed on the first electrode. The dielectric layer is disposed on the first metal layer, wherein the material of the first metal layer does not react with the material of the dielectric layer. The second electrode is disposed on the dielectric layer.

摘要翻译： 提供电容器及其制造方法。 电容器包括第一电极，第一金属层，电介质层和第二电极。 第一电极设置在基板上。 第一金属层设置在第一电极上。 电介质层设置在第一金属层上，其中第一金属层的材料不与电介质层的材料反应。 第二电极设置在电介质层上。

公开(公告)号：US20120264354A1

公开(公告)日：2012-10-18

申请号：US13086367

申请日：2011-04-13

申请人： Chien-Mao Liao ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Chien-Mao Liao ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： B24B49/12 ,  B24B49/08

CPC分类号： H01L21/67259 ,  B24B37/005 ,  B24B37/30 ,  B24B49/08 ,  B24B49/10 ,  B24B49/12 ,  H01L21/68735

摘要： A distance monitoring device is provided. The device is suitable for a chemical mechanical polishing (CMP) apparatus. A polishing head of the CMP apparatus includes a frame and a membrane. The membrane is mounted on the frame, and a plurality of air bags is formed by the membrane and the frame in the polishing head. The distance monitoring device includes a plurality of distance detectors disposed on the frame corresponding to the air bags respectively to set a location of each of the distance detectors on the frame as a reference point, wherein each of the distance detectors is configured to measure a distance between each of the reference points and the membrane.

摘要翻译： 提供了一种距离监测装置。 该设备适用于化学机械抛光（CMP）设备。 CMP设备的抛光头包括框架和膜。 膜安装在框架上，并且多个气囊由抛光头中的膜和框架形成。 距离监视装置包括多个距离检测器，其分别布置在与气囊对应的框架上，以将每个距离检测器的位置设置在框架上作为参考点，其中每个距离检测器被配置成测量距离 在每个参考点和膜之间。