公开(公告)号：US08551881B2

公开(公告)日：2013-10-08

申请号：US13093735

申请日：2011-04-25

申请人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/44

CPC分类号： H01L21/304 ,  H01L21/76898

摘要： A method of bevel trimming a three dimensional (3D) semiconductor device is disclosed, comprising providing a substrate with stack layers thereon and through substrate vias (TSV) therein, wherein an edge of the substrate is curved, performing a bevel trimming step to the curved edge of the substrate for obtaining a planar edge, and thinning the substrate to expose the through substrate vias.

摘要翻译： 公开了一种斜面修整三维（3D）半导体器件的方法，包括提供衬底上的堆叠层，并通过其中的衬底通孔（TSV），其中衬底的边缘是弯曲的，对弯曲的 边缘，用于获得平面边缘，并且使基板变薄以暴露通过的基板通孔。

公开(公告)号：US08420541B2

公开(公告)日：2013-04-16

申请号：US13102506

申请日：2011-05-06

申请人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/311 ,  H01L21/31

CPC分类号： H01L21/76224 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02307 ,  H01L21/02326 ,  H01L21/3105 ,  H01L21/76227

摘要： A method for increasing adhesion between polysilazane and silicon nitride is disclosed, comprising, providing a substrate comprising a trench, forming a silicon nitride liner layer on a bottom surface and a sidewall of the trench, performing a treating process to the silicon nitride liner layer for producing a hydrophilic surface with OH groups that can increase adhesion between the silicon nitride liner layer and a subsequently formed polysilazane coating layer, and forming a polysilazane coating layer into the trench and on the silicon nitride liner layer.

摘要翻译： 公开了一种用于增加聚硅氮烷和氮化硅之间的粘合性的方法，包括：提供包括沟槽的衬底，在沟槽的底表面和侧壁上形成氮化硅衬垫层，对氮化硅衬垫层执行处理工艺 产生具有OH基团的亲水表面，其可以增加氮化硅衬垫层和随后形成的聚硅氮烷涂层之间的粘附性，以及在沟槽和氮化硅衬垫层中形成聚硅氮烷涂层。

公开(公告)号：US20120276707A1

公开(公告)日：2012-11-01

申请号：US13096985

申请日：2011-04-28

申请人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/31

CPC分类号： H01L21/76224

摘要： A method for forming a trench isolation is disclosed, comprising, providing a substrate comprising a trench, forming a polysilicon layer in the trench, and subjecting the substrate to a treating process to convert the polysilicon layer to an isolating layer, wherein the treating process is fine tuned for the isolating layer on opposite sidewalls of the trench to expand to contact with each other so that the isolating layer fills the trench.

摘要翻译： 公开了一种用于形成沟槽隔离的方法，包括：提供包括沟槽的衬底，在沟槽中形成多晶硅层，并对衬底进行处理工艺以将多晶硅层转化为隔离层，其中处理工艺为 对于沟槽的相对侧壁上的隔离层进行微调，以使其彼此接触以使隔离层填充沟槽。

公开(公告)号：US06867142B2

公开(公告)日：2005-03-15

申请号：US10247422

申请日：2002-09-18

申请人： Yi-Nan Chen ,  Shing-Yih Shih ,  Hsien-Wen Liu

发明人： Yi-Nan Chen ,  Shing-Yih Shih ,  Hsien-Wen Liu

IPC分类号： H01L21/321 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/302 ,  C09K13/00

CPC分类号： H01L21/32134 ,  H01L21/3212 ,  H01L21/76877

摘要： A method to prevent electrical shorts between tungsten interconnects. First, a semiconductor substrate having an insulating layer thereon is provided. Then, the insulating layer is selectively etched to form a trench for interconnect. Then, a titanium nitride film is conformally deposited on the surface of the trench and the insulating layer. A tungsten layer is then deposited to fill the trench. Next, the tungsten layer above the titanium nitride film is removed by an ammonia hydrogen peroxide mixture (APM) solution. Next, the titanium nitride film above the insulating layer is removed by a sulfuric acid hydrogen peroxide mixture (SPM) solution to leave a tungsten interconnect within the trench.

摘要翻译： 防止钨互连之间电短路的方法。 首先，提供其上具有绝缘层的半导体衬底。 然后，选择性地蚀刻绝缘层以形成用于互连的沟槽。 然后，氮化钛膜被共形沉积在沟槽和绝缘层的表面上。 然后沉积钨层以填充沟槽。 接下来，通过氨过氧化氢混合物（APM）溶液除去氮化钛膜上方的钨层。 接下来，通过硫酸过氧化氢混合物（SPM）溶液除去绝缘层上方的氮化钛膜，以在沟槽内留下钨互连。

公开(公告)号：US20120276714A1

公开(公告)日：2012-11-01

申请号：US13096976

申请日：2011-04-28

申请人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/31

CPC分类号： H01L21/02164 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02326 ,  H01L21/76224 ,  H01L21/76227

摘要： A method of oxidizing polysilazane is disclosed, comprising providing a substrate, comprising a trench, forming a polysilazane layer in the trench, and treating the polysilazane layer in an acid containing solution applied with mega-sonic waves to oxidize the polysilazane layer, wherein the acid containing solution comprises phosphoric acid, sulfuric acid, H2SO4 added with O3 (SOM), H2SO4 added with H2O2 (SPM), H3PO4 added with O3, or H3PO4 added with H2O2, and removing the silicon oxide layer outside of the trench.

摘要翻译： 公开了一种氧化聚硅氮烷的方法，其包括提供基底，包括沟槽，在沟槽中形成聚硅氮烷层，以及处理应用大声波的含酸溶液中的聚硅氮烷层以氧化聚硅氮烷层，其中酸 （SOM），加入H 2 O 2（SPM）的H 2 SO 4，添加有O 3的H 3 PO 4或加入H 2 O 2的H 3 PO 4，并除去沟槽外的氧化硅层。

公开(公告)号：US20120270394A1

公开(公告)日：2012-10-25

申请号：US13093735

申请日：2011-04-25

申请人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Shing-Yih Shih ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/768

CPC分类号： H01L21/304 ,  H01L21/76898

摘要： A method of bevel trimming a three dimensional (3D) semiconductor device is disclosed, comprising providing a substrate with stack layers thereon and through substrate vias (TSV) therein, wherein an edge of the substrate is curved, performing a bevel trimming step to the curved edge of the substrate for obtaining a planar edge, and thinning the substrate to expose the through substrate vias.

摘要翻译： 公开了一种斜面修整三维（3D）半导体器件的方法，包括提供衬底上的堆叠层，并通过其中的衬底通孔（TSV），其中衬底的边缘是弯曲的，对弯曲的 边缘，用于获得平面边缘，并且使基板变薄以暴露通过的基板通孔。

公开(公告)号：US20050101124A1

公开(公告)日：2005-05-12

申请号：US10702493

申请日：2003-11-07

申请人： Chang-Ming Wu ,  Shing-Yih Shih ,  Yi-Nan Chen

发明人： Chang-Ming Wu ,  Shing-Yih Shih ,  Yi-Nan Chen

IPC分类号： H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/76802 ,  H01L21/76834

摘要： A via contact forming method. The method includes the steps of providing a substrate; forming a first dielectric layer on the substrate; forming a bit line in the first dielectric layer; forming a liner layer on the first dielectric layer containing the bit line; forming a second dielectric layer on the liner layer; in the second dielectric layer, forming a contact hole leading to the bit line; and filling the contact hole with metal to form a via contact. The via contact forming method in accordance with the present invention has high tolerance to misalignment between the via contact and the bit line, while maintaining low resistance and good electric performance.

摘要翻译： 通孔接触形成方法。 该方法包括提供基板的步骤; 在所述基板上形成第一电介质层; 在第一介电层中形成位线; 在包含所述位线的所述第一介质层上形成衬垫层; 在所述衬垫层上形成第二电介质层; 在第二电介质层中形成通向位线的接触孔; 并用金属填充接触孔以形成通孔接触。 根据本发明的通孔接触形成方法在保持低电阻和良好的电性能的同时对通孔接触和位线之间的未对准具有高容限性。

公开(公告)号：US08963282B2

公开(公告)日：2015-02-24

申请号：US13231961

申请日：2011-09-14

申请人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L29/72 ,  H01L23/31 ,  H01L23/00 ,  H01L21/78 ,  H01L21/56

CPC分类号： H01L23/562 ,  H01L21/311 ,  H01L21/561 ,  H01L21/76224 ,  H01L21/78 ,  H01L23/3178 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor structure includes a matrix, an integrated circuit and a scribe line. The matrix includes a scribe line region and a circuit region. The integrated circuit is disposed within the circuit region. The scribe line is disposed within the scribe line region and includes a crack stop trench which is disposed in the matrix and adjacent to the circuit region. The crack stop trench is parallel with one side of the circuit region and filled with a composite material in a form of a grid to form a crack stop structure.

摘要翻译： 半导体结构包括矩阵，集成电路和划线。 矩阵包括划线区域和电路区域。 集成电路设置在电路区域内。 划痕线设置在划线区域内并且包括设置在矩阵中并且邻近电路区域的裂缝停止沟槽。 裂缝停止沟槽与电路区域的一侧平行，并填充有格栅形式的复合材料以形成裂纹停止结构。

公开(公告)号：US08692245B2

公开(公告)日：2014-04-08

申请号：US13214227

申请日：2011-08-21

申请人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L23/544 ,  H01L23/482 ,  H01L21/762

CPC分类号： H01L21/76224 ,  H01L23/562 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention in a first aspect proposes a semiconductor structure with a crack stop structure. The semiconductor structure includes a matrix, an integrated circuit and a scribe line. The matrix includes a scribe line region and a circuit region. The integrated circuit is disposed within the circuit region. The scribe line is disposed within the scribe line region and includes a crack stop trench which is disposed in the matrix and adjacent to the circuit region. The crack stop trench is parallel with one side of the circuit region and filled with a composite material in the form of a grid to form a crack stop structure.

摘要翻译： 本发明在第一方面提出了一种具有裂纹停止结构的半导体结构。 半导体结构包括矩阵，集成电路和划线。 矩阵包括划线区域和电路区域。 集成电路设置在电路区域内。 划痕线设置在划线区域内并且包括设置在矩阵中并且邻近电路区域的裂缝停止沟槽。 裂缝停止沟槽与电路区域的一侧平行，并填充有格栅形式的复合材料以形成裂纹停止结构。

公开(公告)号：US08642479B2

公开(公告)日：2014-02-04

申请号：US13183358

申请日：2011-07-14

申请人： Chih-Ching Lin ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Chih-Ching Lin ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： H01L21/302

CPC分类号： H01L21/76802 ,  H01L21/31144 ,  H01L21/32137

摘要： A method for forming an opening in a semiconductor device is provided, including: providing a semiconductor substrate with a silicon oxide layer, a polysilicon layer and a silicon nitride layer sequentially formed thereover; patterning the silicon nitride layer, forming a first opening in the silicon nitride layer, wherein the first opening exposes a top surface of the polysilicon layer; performing a first etching process, using gasous etchants including hydrogen bromide (HBr), oxygen (O2), and fluorocarbons (CxFy), forming a second opening in the polysilicon layer, wherein a sidewall of the polysilicon layer adjacent to the second opening is substantially perpendicular to a top surface of the silicon oxide layer, wherein x is between 1-5 and y is between 2-8; removing the silicon nitride layer; and performing a second etching process, forming a third opening in the silicon oxide layer exposed by the second opening.

摘要翻译： 提供了一种在半导体器件中形成开口的方法，包括：向半导体衬底提供其上顺序形成的氧化硅层，多晶硅层和氮化硅层; 图案化氮化硅层，在氮化硅层中形成第一开口，其中第一开口暴露多晶硅层的顶表面; 使用包括溴化氢（HBr），氧（O 2）和碳氟化合物（C x F y）的气体蚀刻剂进行第一蚀刻工艺，在多晶硅层中形成第二开口，其中与第二开口相邻的多晶硅层的侧壁基本上 垂直于氧化硅层的顶表面，其中x在1-5之间，y在2-8之间; 去除氮化硅层; 以及进行第二蚀刻工艺，在由所述第二开口暴露的所述氧化硅层中形成第三开口。