公开(公告)号：US07236553B1

公开(公告)日：2007-06-26

申请号：US10763905

申请日：2004-01-23

申请人： Hoon Choi ,  Gyudong Kim ,  Daeyun Shim ,  Bruce Kim ,  Seung Ho Hwang

发明人： Hoon Choi ,  Gyudong Kim ,  Daeyun Shim ,  Bruce Kim ,  Seung Ho Hwang

IPC分类号： H04L7/00

CPC分类号： H04L7/0337 ,  H04L7/0008

摘要： A data sampling method and circuit employing an oversampling clock to oversample a data signal, a phase tracker for use with or in a data sampling circuit, and a method for identifying a sequence of best sampling positions for sampling a data signal from signal samples generated using an oversampling clock. In some embodiments, data indicative of the phase of at least one of the oversampling clock's sampling positions relative to the center of the data eye are low-pass filtered in a manner determined by the data signal's bit rate. In other embodiments, the number of dead cycles of the phase tracker decision loop is reduced by generating possible solutions in parallel and moving the feedback point so as to occur as late as practical, or the phase tracker ignores a sample set when updating its determination of the best sampling position when the sample set indicates that the data signal has less than a predetermined number of transitions during a corresponding tracking period.

摘要翻译： 使用过采样时钟对数据信号进行过采样的数据采样方法和电路，与数据采样电路一起使用或在数据采样电路中使用的相位跟踪器，以及用于识别最佳采样位置序列的方法，用于从使用 过采样时钟。 在一些实施例中，指示相对于数据眼睛的中心的过采样时钟的采样位置中的至少一个的相位的数据以由数据信号的比特率确定的方式进行低通滤波。 在其他实施例中，相位跟踪器判定循环的死循环的数量通过并行产生可能的解并且将反馈点移动以便尽可能晚地发生而减少，或者当更新其样本集的确定时，相位跟踪器忽略样本集 当样本集合表示在对应的跟踪周期期间数据信号具有小于预定数量的转换时的最佳采样位置。

公开(公告)号：US06969766B2

公开(公告)日：2005-11-29

申请号：US10424181

申请日：2003-04-25

申请人： Sung Kee Kim ,  Hyunil Lee ,  Jong Chan Lim ,  Hoon Choi ,  Jae Hoon Jeon ,  Sang Youl Ahn ,  Sung Hee Lee ,  Won Jun Yoon

发明人： Sung Kee Kim ,  Hyunil Lee ,  Jong Chan Lim ,  Hoon Choi ,  Jae Hoon Jeon ,  Sang Youl Ahn ,  Sung Hee Lee ,  Won Jun Yoon

IPC分类号： C12N15/09 ,  A61K31/513 ,  A61K31/52 ,  C07D277/80 ,  C07D405/12 ,  C07D417/04 ,  C07D417/12 ,  C07D417/14 ,  C07D473/02 ,  C07D473/18 ,  C07D473/32 ,  C07D473/34 ,  C07D247/02 ,  C07D413/12

CPC分类号： C07D417/04 ,  C07B2200/11 ,  C07D277/80 ,  C07D417/12 ,  C07D417/14 ,  Y02P20/55

摘要： This application relates to monomers of the general formula (I) for the preparation of PNA (peptide nucleic acid) oligomers and provides method for the synthesis of both predefined sequence PNA oligomers and random sequence PNA oligomers: wherein E is nitrogen or C—R′; J is sulfur or oxygen; R′, R1, R2, R3, R4 is independently H, halogen, alkyl, nitro, nitrile, alkoxy, halogenated alkyl, halogenated alkoxy, phenyl or halogenated phenyl, R5 is H or protected or unprotected side chain of natural or unnatural α-amino acid; and B is a natural or unnatural nucleobase, wherein when said nucleobase has an exocyclic amino function, said function is protected by protecting group which is labile to acids but stable to weak to medium bases in the presence of thiol.

摘要翻译： 本申请涉及用于制备PNA（肽核酸）寡聚体的通式（I）的单体，并提供合成预定义的序列PNA寡聚体和随机序列PNA寡聚体的方法：其中E为氮或C-R' ; J为硫或氧; R'，R 1，R 2，R 3，R 4独立地是H，卤素，烷基，硝基，腈，烷氧基，卤代烷基，卤代烷氧基，苯基或卤代苯基，R 5是H或被保护或未被保护的天然或非天然α- 氨基酸; 并且B是天然或非天然核碱基，其中当所述核碱基具有环外氨基功能时，所述功能受到在硫醇存在下对酸不稳定但对弱至中碱稳定的保护基保护。

公开(公告)号：US06560679B2

公开(公告)日：2003-05-06

申请号：US09742030

申请日：2000-12-20

申请人： Hoon Choi ,  Myung-Kyoon Yim

发明人： Hoon Choi ,  Myung-Kyoon Yim

IPC分类号： G06F1208

CPC分类号： G06F12/0882 ,  G06F12/0862 ,  G06F12/0864 ,  G06F2212/1028 ,  Y02D10/13

摘要： A digital data processing system is provided which includes a digital data processor, a cache memory having a tag RAM and a data RAM, and a controller for controlling accesses to the cache memory. The controller stores state information on access type, operation mode and cache hit/miss associated with the most recent access to the tag RAM, and controls a current access to the tag RAM just after the preceding access based on the state information and a portion of a set field of a main memory address for the second access. The controller determines whether the current access is applied to the same cache line that was accessed in the first access based on the state information and a portion of a set field of the main memory address for the second access, and allows the current access to be skipped when the current access is applied to the same cache line that was accessed in the preceding access.

摘要翻译： 提供了一种数字数据处理系统，其包括数字数据处理器，具有标签RAM和数据RAM的高速缓冲存储器，以及用于控制对高速缓存存储器的访问的控制器。 控制器存储关于与最近访问标签RAM相关联的访问类型，操作模式和高速缓存命中/错误的状态信息，并且基于状态信息控制刚刚在上述访问之后的标签RAM的当前访问 用于第二次访问的主存储器地址的设置字段。 控制器基于状态信息和用于第二次访问的主存储器地址的设置字段的一部分来确定当前访问是应用于在第一访问中访问的相同高速缓存行，并且允许当前访问是 当当前访问应用于在上一次访问中访问的同一个高速缓存行时跳过。

公开(公告)号：US06345003B1

公开(公告)日：2002-02-05

申请号：US09350639

申请日：1999-07-09

申请人： Hoon Choi

发明人： Hoon Choi

IPC分类号： G11C700

CPC分类号： G11C29/785 ,  G11C29/787 ,  G11C29/80

摘要： Integrated circuit memory device redundancy circuits include a plurality of field effect transistors and fuses, a respective field effect transistor and a respective fuse being serially coupled between a respective address line and a logic circuit to generate a selection signal for a redundant memory cell in response to a predetermined address on the address lines. A pump-up circuit generates a pump-up voltage from a power supply voltage, wherein the pump-up voltage is greater than the power supply voltage. The pump-up voltage is applied to the gates of the field effect transistors to activate the redundancy circuit. According to another aspect, a redundancy circuit for an integrated circuit memory device comprises a repair controlling circuit that includes a repair fuse and that generates a repair control signal in response to opening of the repair control fuse. The enable controlling circuit is responsive to the repair controlling circuit and includes an enable fuse to generate a redundant enable signal in response to the repair control signal and opening of the enable fuse. A redundancy signal generator is responsive to the enable controlling circuit to generate a selection signal for a redundant memory cell in response to receipt of an address of a defective memory cell.

摘要翻译： 集成电路存储器件冗余电路包括多个场效应晶体管和保险丝，相应的场效应晶体管和相应的熔丝串联耦合在相应的地址线和逻辑电路之间，以响应于冗余存储器单元产生冗余存储器单元的选择信号 地址线上的预定地址。 泵浦电路从电源电压产生泵浦电压，其中泵浦电压大于电源电压。 泵浦电压被施加到场效应晶体管的栅极以激活冗余电路。 根据另一方面，一种用于集成电路存储器件的冗余电路包括修复控制电路，该修复控制电路包括修复熔丝，并且响应于修复控制熔丝的打开产生修复控制信号。 使能控制电路响应于修复控制电路并且包括使能熔丝以响应于修复控制信号和使能保险丝的打开而产生冗余使能信号。 冗余信号发生器响应于使能控制电路响应于接收到有缺陷的存储器单元的地址而产生用于冗余存储器单元的选择信号。

公开(公告)号：US5933382A

公开(公告)日：1999-08-03

申请号：US988499

申请日：1997-12-10

申请人： Chul-woo Yi ,  Jae-hwan Yoo ,  Hoon Choi

发明人： Chul-woo Yi ,  Jae-hwan Yoo ,  Hoon Choi

IPC分类号： G11C29/04 ,  G11C7/00 ,  G11C11/407 ,  G11C29/00

CPC分类号： G11C29/83 ,  G11C29/785

摘要： A redundant fuse circuit for enabling a redundant memory cell to replace a defective memory cell in a semiconductor memory device is shown where the redundant fuse circuit includes a selection fuse coupled between a precharging device of the redundant fuse circuit and a power supply terminal. When the redundant fuse circuit is unused, the selection fuse is configured to be cut by a laser beam thereby preventing precharging of the redundant fuse circuit and, consequently, preventing an instantaneous peak current from occurring responsive to input to the redundant fuse circuit of memory cell address information corresponding to normal memory cells.

摘要翻译： 示出了用于使冗余存储单元能够替代半导体存储器件中的有缺陷的存储单元的冗余熔丝电路，其中冗余熔丝电路包括耦合在冗余熔丝电路的预充电装置与电源端之间的选择熔丝。 当冗余保险丝电路未使用时，选择保险丝被配置为被激光束切割，从而防止冗余熔丝电路的预充电，并因此防止响应于对存储器单元的冗余熔丝电路的输入而产生瞬时峰值电流 对应于正常存储单元的地址信息。

公开(公告)号：US5786711A

公开(公告)日：1998-07-28

申请号：US668094

申请日：1996-06-17

申请人： Hoon Choi

发明人： Hoon Choi

IPC分类号： G11C11/41 ,  G11C7/00 ,  G11C7/10 ,  G11C11/407 ,  G11C11/409 ,  G11C11/417 ,  H03K19/00 ,  H03K19/0185 ,  H03K19/017

CPC分类号： G11C7/1051 ,  H03K19/0016

摘要： A data output buffer of a semiconductor memory device having a data output driver comprised of a pull-up transistor and a pull-down transistor includes a precharging circuit for precharging a gate terminal of the pull-up transistor of the data output driver to a power supply voltage level. Precharging the output driver reduces the load on the pumping voltage generator. This feature, together with precharging the pumping voltage generator itself, allow clocking the pumping voltage generator at a reduced clock rate to reduce power consumption without compromising operating speed of the memory device.

摘要翻译： 具有由上拉晶体管和下拉晶体管组成的数据输出驱动器的半导体存储器件的数据输出缓冲器包括：预充电电路，用于将数据输出驱动器的上拉晶体管的栅极端子预充电到电源 电源电压电平。 对输出驱动器进行预充电降低了泵浦电压发生器的负载。 该特征与泵送电压发生器本身预充电允许以降低的时钟速率对泵浦电压发生器进行计时以降低功耗，而不会影响存储器件的操作速度。

公开(公告)号：US5197031A

公开(公告)日：1993-03-23

申请号：US827578

申请日：1992-01-29

申请人： Hoon Choi

发明人： Hoon Choi

IPC分类号： G11C29/34 ,  G11C29/36 ,  G11C29/56

CPC分类号： G11C29/36 ,  G11C29/34 ,  G11C29/56

摘要： A circuit for testing a memory device includes a data writing circuit, a data checking circuit, and a control circuit. A method for writing data in testing the memory device comprises the steps of generating a voltage difference between a pair of bit lines B/L and B/L, and storing directly data corresponding to the voltage difference in a capacitor of a memory cell. Direct writing of data on the bit lines is performed. Moreover, each memory cell is totally checked during one cycle, and the test time is greatly reduced.

摘要翻译： 用于测试存储器件的电路包括数据写入电路，数据检查电路和控制电路。 一种用于在测试存储器件中写入数据的方法包括以下步骤：产生一对位线B / L和＆lt;上升＆B / L之间的电压差，并将对应于电压差的数据直接存储在存储器单元的电容器中。 执行位线上数据的直接写入。 此外，每个存储单元在一个周期内完全检查，并且测试时间大大降低。

公开(公告)号：US09429786B2

公开(公告)日：2016-08-30

申请号：US13087052

申请日：2011-04-14

申请人： Jin-sub Kim ,  Kwang-youn Kim ,  Jin-hyun Cho ,  Hoon Choi

发明人： Jin-sub Kim ,  Kwang-youn Kim ,  Jin-hyun Cho ,  Hoon Choi

IPC分类号： G02F1/1333 ,  G02F1/1335

CPC分类号： G02F1/133382 ,  G02F1/133615 ,  G02F2001/133628

摘要： A display module including a liquid crystal panel that displays an input image, a backlight unit that produces light, at least one optical sheet that emits the light produced by the backlight unit toward a rear side of the liquid crystal panel and a temperature compensation unit having a heating sheet that transfers heat to a region of the liquid crystal panel are provided. The heating sheet has a heating wire disposed in a first region of the heating sheet and excluding a second region of the heating sheet superimposed over at least one of a liquid crystal driving board, a processing board, and a power supply unit.

摘要翻译： 一种显示模块，包括显示输入图像的液晶面板，产生光的背光单元，至少一个光学片，其将背光单元产生的光朝向液晶面板的后侧发射;以及温度补偿单元， 提供将热量传递到液晶面板的区域的加热片。 加热片具有设置在加热片的第一区域中的加热线，并且不包括叠加在液晶驱动板，处理板和电源单元中的至少一个上的加热片的第二区域。

公开(公告)号：US09077940B2

公开(公告)日：2015-07-07

申请号：US12949122

申请日：2010-11-18

申请人： Hoon Choi ,  Hyeon-Joo Lee

发明人： Hoon Choi ,  Hyeon-Joo Lee

IPC分类号： H04N5/00 ,  G06Q99/00 ,  H04N5/64 ,  G06F1/16 ,  G06Q50/18 ,  F16M11/10

CPC分类号： H05K5/0017 ,  F16M11/10 ,  G06F1/1601 ,  G06F1/1605 ,  G06Q50/188 ,  G06Q99/00 ,  H04N5/64 ,  H05K5/0204 ,  H05K5/0234

摘要： A display apparatus includes: a display unit which includes a display connector and displays an image; and a main body which includes a power supply unit for supplying power to the display unit, an image processing unit for outputting image signals, and a main body connector which is directly or indirectly connected to the display connector in order to supply the power and the image signals output from the power supply unit and the image processing unit, respectively, to the display unit.

摘要翻译： 一种显示装置，包括：显示单元，包括显示连接器并显示图像; 以及主体，其包括用于向显示单元供电的电源单元，用于输出图像信号的图像处理单元和直接或间接连接到显示连接器的主体连接器，以便提供电力和 图像信号分别从电源单元和图像处理单元输出到显示单元。

公开(公告)号：US08879012B2

公开(公告)日：2014-11-04

申请号：US12561553

申请日：2009-09-17

申请人： Kyo Ho Moon ,  Chul Gu Lee ,  Seong Woo Jeong ,  Jeong Yeon Kim ,  Ji Suk Kim ,  Hoon Choi ,  Sang Moo Park ,  Sang Kug Han

发明人： Kyo Ho Moon ,  Chul Gu Lee ,  Seong Woo Jeong ,  Jeong Yeon Kim ,  Ji Suk Kim ,  Hoon Choi ,  Sang Moo Park ,  Sang Kug Han

IPC分类号： G02F1/136 ,  G02F1/1333 ,  G02F1/1343 ,  H01L29/786 ,  G02F1/1335

CPC分类号： H01L29/7869 ,  G02F1/133509 ,  H01L29/78633

摘要： An array substrate for a liquid crystal display device and a fabrication method thereof, and a liquid crystal display device having the same are disclosed. The array substrate for a liquid crystal display device and a fabrication method thereof, and a liquid crystal display device having the same according to the present disclosure eliminate optical loss by use of a shielding film that can decrease the optic leakage current to minimize the optic leakage loss, thus it is possible to improve the picture quality.

摘要翻译： 公开了一种液晶显示装置用阵列基板及其制造方法以及具有该液晶显示装置的液晶显示装置的液晶显示装置。 液晶显示装置用阵列基板及其制造方法以及具有该液晶显示装置的液晶显示装置的液晶显示装置以及具有该液晶显示装置的液晶显示装置的液晶显示装置通过使用能够降低光泄漏电流的屏蔽膜来消除光损失， 损失，因此可以提高图像质量。