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    Sector failure prediction method and related system
    101.
    发明授权
    Sector failure prediction method and related system 有权
    部门故障预测方法及相关系统

    公开(公告)号：US08886991B2

    公开(公告)日：2014-11-11

    申请号：US13661201

    申请日：2012-10-26

    Applicant: LSI Corporation

    Inventor： Fan Zhang ,  Shaohua Yang

    IPC: G06F11/00 ,  G06F11/18

    CPC classification number: G06F11/008

    Abstract: A method and system is disclosed for identification and removal of a memory sector prone to failure. The method performs satisfaction checks on the memory sector and monitors and stores returned Unsatisfied Checks (USC) for analysis by a pattern recognition algorithm. Once a first global iteration is pattern matched with a second global iteration from the sector, the method determines the period of the repetitive pattern. The method then identifies, as the sector prone to failure, the sector having the defined pattern and period. Once identified, the method uses a power management scheme to remove the sector prone to failure from further use by the memory system and displays to a user the details of the action taken.

    Abstract translation: 公开了用于识别和去除容易发生故障的存储器扇区的方法和系统。 该方法对存储器部分进行满意度检查，并通过模式识别算法监视和存储返回的不满意检查（USC）以进行分析。 一旦第一次全局迭代模式与扇区的第二次全局迭代模式匹配，该方法确定重复模式的周期。 然后，该方法识别出具有定义的模式和周期的扇区作为易于发生故障的扇区。 一旦识别出来，该方法使用电源管理方案去除容易发生故障的扇区，以便存储器系统进一步使用，并向用户显示所采取的动作的细节。

    Signal processing circuitry with frontend and backend circuitry controlled by separate clocks
    109.
    发明授权
    Signal processing circuitry with frontend and backend circuitry controlled by separate clocks 有权
    信号处理电路，前端和后端电路由单独的时钟控制

    公开(公告)号：US08773799B1

    公开(公告)日：2014-07-08

    申请号：US13724946

    申请日：2012-12-21

    Applicant: LSI Corporation

    Inventor： Suharli Tedja ,  Shaohua Yang ,  Fan Zhang ,  Qi Zuo ,  Joseph Garofalo ,  Yu Kou

    IPC: G11B5/09

    CPC classification number: G06F1/06 ,  G06F1/08 ,  G06F1/206

    Abstract: An apparatus comprises read channel circuitry and associated signal processing circuitry comprising frontend processing circuitry and backend processing circuitry. The frontend processing circuitry comprises a loop detector and equalizer configured to determine an equalized read channel signal from a read channel signal and a decoding module configured to apply verification and scrambling processing on a decoded read channel signal. The backend processing circuitry comprises a backend detector, an interleaver, a backend decoder, and a de-interleaver configured to perform an iterative decoding process on the equalized read channel signal to determine the decoded read channel signal. The frontend processing circuitry is controlled by a first clock having an associated first clock rate and the backend processing circuitry is controlled by a selected one of the first clock and a second clock having an associated second clock rate determined at least in part by the first clock rate and a maximum clock rate.

    Abstract translation: 一种装置包括读通道电路和包括前端处理电路和后端处理电路的相关信号处理电路。 前端处理电路包括环路检测器和均衡器，其被配置为从读取信道信号确定均衡的读取信道信号，以及解码模块，被配置为对解码的读取信道信号进行验证和加扰处理。 后端处理电路包括后端检测器，交织器，后端解码器和解交织器，被配置为对均衡的读信道信号执行迭代解码处理，以确定解码的读信道信号。 前端处理电路由具有相关联的第一时钟速率的第一时钟控制，并且后端处理电路由第一时钟中所选择的一个控制，第二时钟具有至少部分地由第一时钟确定的相关联的第二时钟速率 速率和最大时钟速率。

    SYNC MARK DETECTION USING BRANCH METRICS FROM DATA DETECTOR
    110.
    发明申请
    SYNC MARK DETECTION USING BRANCH METRICS FROM DATA DETECTOR 有权
    从数据检测器使用分支量测的SYNC MARK检测

    公开(公告)号：US20140185159A1

    公开(公告)日：2014-07-03

    申请号：US13728443

    申请日：2012-12-27

    Applicant: LSI CORPORATION

    Inventor： Shaohua Yang ,  Yoon L. Liow ,  Wu Chang ,  Xuebin Wu

    IPC: G11B20/14

    CPC classification number: G11B20/10222

    Abstract: Methods and apparatus are provided for detecting a sync mark in a storage system, such as a hard disk drive. A sync mark is detected in a storage system by obtaining one or more branch metrics from a data detector in the storage system; generating one or more sync mark metrics using the one or more branch metrics from the data detector; and identifying the sync mark based on the sync mark metrics. An input data set is optionally compared with a plurality of portions of a sync mark pattern to yield corresponding comparison values and the comparison values can be summed to obtain at least one result. A sync mark found signal is asserted based upon the at least one result.

    Abstract translation: 提供了用于检测诸如硬盘驱动器的存储系统中的同步标记的方法和装置。 在存储系统中通过从存储系统中的数据检测器获得一个或多个分支度量来检测同步标记; 使用来自所述数据检测器的所述一个或多个分支度量来生成一个或多个同步标记度量; 以及基于同步标记度量识别同步标记。 输入数据组可选地与同步标记图案的多个部分进行比较，以产生相应的比较值，并且可以将比较值相加以获得至少一个结果。 基于至少一个结果来确定发现同步标记信号。

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