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    Memory Circuitry And Method Used In Forming Memory Circuitry
    101.
    发明公开
    Memory Circuitry And Method Used In Forming Memory Circuitry 审中-公开

    公开(公告)号：US20230389313A1

    公开(公告)日：2023-11-30

    申请号：US17869586

    申请日：2022-07-20

    Applicant: Micron Technology, Inc.

    Inventor： Jordan D. Greenlee ,  Jiewei Chen ,  John D. Hopkins ,  Everett A. McTeer

    IPC: H01L27/11582 ,  H01L27/11556

    CPC classification number: H01L27/11582 ,  H01L27/11556

    Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a first vertical stack comprising vertically-alternating insulative tiers and conductive tiers. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. A second vertical stack is aside the first vertical stack. The second vertical stack comprises insulative tiers collectively comprising at least two different compositions relative individual of the insulative tiers. Individual of the at least two different compositions comprise silicon nitride. One of the individual different compositions comprise carbon-doped silicon nitride having at least 0.5 atomic percent more carbon than atomic percent of carbon, if any, in the silicon nitride of another of the individual different compositions. Other embodiments, including method, are disclosed.

    Memory arrays and methods used in forming a memory array comprising strings of memory cells
    104.
    发明授权
    Memory arrays and methods used in forming a memory array comprising strings of memory cells 有权

    公开(公告)号：US11765902B2

    公开(公告)日：2023-09-19

    申请号：US17491752

    申请日：2021-10-01

    Applicant: Micron Technology, Inc.

    Inventor： John D. Hopkins ,  Lifang Xu

    IPC: H10B43/27 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35 ,  H10B41/10 ,  H10B43/10

    CPC classification number: H10B43/27 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35 ,  H10B41/10 ,  H10B43/10

    Abstract: A memory array comprising strings of memory cells comprises a vertical stack comprising alternating insulative tiers and conductive tiers. Channel-material strings of memory cells are in the stack. The channel-material strings project upwardly from material of an uppermost of the tiers. A first insulator material is above the material of the uppermost tier directly against sides of channel material of the upwardly-projecting channel-material strings. The first insulator material comprises at least one of (a) and (b), where (a): silicon, nitrogen, and one or more of carbon, oxygen, boron, and phosphorus, and (b): silicon carbide. Second insulator material is above the first insulator material. The first and second insulator materials comprise different compositions relative one another. Conductive vias in the second insulator material are individually directly electrically coupled to individual of the channel-material strings. Other embodiments, including methods, are disclosed.

    Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells
    105.
    发明公开
    Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells 审中-公开

    公开(公告)号：US20230262976A1

    公开(公告)日：2023-08-17

    申请号：US17674289

    申请日：2022-02-17

    Applicant: Micron Technology, Inc.

    Inventor： John D. Hopkins ,  Jordan D. Greenlee

    IPC: H01L27/11565 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11582

    CPC classification number: H01L27/11565 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11582 ,  G11C16/0483

    Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating insulative tiers and conductive tiers having channel-material strings therein. Walls are formed above insulating material that is directly above the channel-material strings. Void space is laterally-between immediately-adjacent of the walls and that comprises a longitudinal outline of individual digitlines to be formed. Spaced openings are in the insulating material directly below the void space. Relative to the walls, a conductive metal nitride is selectively deposited in the void space, in the spaced openings, and atop the insulating material laterally-between the walls and the spaced openings to form a lower portion of the individual digitlines laterally-between the immediately-adjacent walls. The conductive metal nitride that is in individual of the spaced openings is directly electrically coupled to individual of the channel-material strings. A conductive material is formed in the void space directly above and directly electrically coupled to the lower portion of the individual digitlines to form an upper portion thereof. Other embodiments, including structure independent of method, are disclosed,

    Memory array and method used in forming a memory array comprising strings of memory cells
    108.
    发明授权
    Memory array and method used in forming a memory array comprising strings of memory cells 有权

    公开(公告)号：US11659708B2

    公开(公告)日：2023-05-23

    申请号：US17091420

    申请日：2020-11-06

    Applicant: Micron Technology, Inc.

    Inventor： John D. Hopkins ,  Nancy M. Lomeli

    IPC: H01L27/11582

    CPC classification number: H10B41/27 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

    Abstract: A memory array comprises a conductor tier comprising upper conductor material directly above and directly electrically coupled to lower conductor material. The upper and lower conductor materials comprise different compositions relative one another. Laterally-spaced memory blocks individually comprising a vertical stack comprise alternating insulative tiers and conductive tiers, Channel-material strings of memory cells extend through the insulative tiers and the conductive tiers and through the upper conductor material into the lower conductor material. The channel material of the channel-material strings is directly electrically coupled to the upper and lower conductor materials of the conductor tier. Intervening material is laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks. Other embodiments, including method, are disclosed.

    Memory array comprising strings of memory cells and method used in forming a memory array comprising strings of memory cells
    109.
    发明授权
    Memory array comprising strings of memory cells and method used in forming a memory array comprising strings of memory cells 有权

    公开(公告)号：US11641737B2

    公开(公告)日：2023-05-02

    申请号：US17162062

    申请日：2021-01-29

    Applicant: Micron Technology, Inc.

    Inventor： Alyssa N. Scarbrough ,  John D. Hopkins

    IPC: H01L27/11556 ,  H01L27/11582 ,  H01L21/48 ,  H01L23/522 ,  G11C5/06

    Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. The stack comprises laterally-spaced memory-block regions. Simultaneously, (a), (b), and (c) are formed, where (a): horizontally-elongated trenches into the stack laterally-between immediately-laterally-adjacent of the memory-block regions; (b): channel openings into the stack laterally-between the horizontally-elongated trenches; and (c): through-array-via (TAV) openings into the stack in a stair-step region. Intervening material is formed in the horizontally-elongated trenches, a channel-material string in individual of the channel openings, and conductive material in the TAV openings. Other aspects, including structure independent of method, are disclosed.

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