公开(公告)号：US20090224298A1

公开(公告)日：2009-09-10

申请号：US12437373

申请日：2009-05-07

Applicant: Chang Hun HAN

Inventor： Chang Hun HAN

IPC: H01L31/10

CPC classification number: H01L27/14683 ,  H01L27/14603

Abstract: Disclosed are a CMOS image sensor and a manufacturing method thereof. The method includes the steps of: forming an isolation layer on a semiconductor substrate, defining an active region that includes a photo diode region and a transistor region; forming a gate in the transistor region, the gate including a gate electrode and a gate insulating layer; forming a first low-concentration diffusion region in the photo diode region; forming a second low-concentration diffusion region in the transistor region; forming a buffer layer over the substrate, the buffer layer covering the photo diode region; forming first and second insulating layers over the entire surface of the substrate, the first and second insulating layer having a different etching selectivity from each other; forming an insulating sidewall on sides of the gate electrode by selective removal of the second insulating layer; removing the first insulating layer from the transistor region; forming a high-concentration diffusion region in the exposed transistor region, partially overlapping the second low-concentration diffusion region; and forming a metal silicide layer on the high-concentration diffusion region.

Abstract translation: 公开了CMOS图像传感器及其制造方法。 该方法包括以下步骤：在半导体衬底上形成隔离层，限定包括光电二极管区域和晶体管区域的有源区域; 在所述晶体管区域中形成栅极，所述栅极包括栅极电极和栅极绝缘层; 在所述光电二极管区域中形成第一低浓度扩散区域; 在所述晶体管区域中形成第二低浓度扩散区域; 在所述衬底上形成缓冲层，所述缓冲层覆盖所述光电二极管区域; 在衬底的整个表面上形成第一和第二绝缘层，第一和第二绝缘层彼此具有不同的蚀刻选择性; 通过选择性地去除所述第二绝缘层在所述栅电极的侧面上形成绝缘侧壁; 从晶体管区域去除第一绝缘层; 在所述暴露的晶体管区域中形成高浓度扩散区域，部分地与所述第二低浓度扩散区域重叠; 在高浓度扩散区上形成金属硅化物层。

公开(公告)号：US07582504B2

公开(公告)日：2009-09-01

申请号：US11319596

申请日：2005-12-29

Applicant: Chang Hun Han

Inventor： Chang Hun Han

IPC: H01L21/00 ,  H01L31/062 ,  H01L31/113

CPC classification number: H01L27/14685 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14632

Abstract: A CMOS image sensor and a method for manufacturing the same are provided, in which a nitride layer for passivation is used as a microlens to reduce topology. The CMOS image sensor includes an upper metal layer partially deposited on a dielectric layer; a first nitride layer deposited on the upper metal layer; an undoped silicon glass layer deposited on the first nitride layer and polished by chemical-mechanical polishing; color filter array elements deposited and exposed on the undoped silicon glass layer and polished by the chemical-mechanical polishing; and a second nitride layer deposited on the first nitride layer and the color filter array elements and transfer-etched after forming a sacrificial microlens on the second nitride layer.

Abstract translation: 提供一种CMOS图像传感器及其制造方法，其中使用用于钝化的氮化物层作为微透镜以减少拓扑结构。 CMOS图像传感器包括部分沉积在电介质层上的上金属层; 沉积在上金属层上的第一氮化物层; 沉积在第一氮化物层上并通过化学机械抛光抛光的未掺杂的硅玻璃层; 滤色器阵列元件沉积并暴露在未掺杂的硅玻璃层上，并通过化学机械抛光抛光; 以及沉积在第一氮化物层和滤色器阵列元件上的第二氮化物层，并且在第二氮化物层上形成牺牲微透镜之后进行转印蚀刻。

公开(公告)号：US20090166627A1

公开(公告)日：2009-07-02

申请号：US12344438

申请日：2008-12-26

Applicant: Chang-Hun Han

Inventor： Chang-Hun Han

IPC: H01L31/02 ,  H01L31/0376 ,  H01L21/04

CPC classification number: H01L27/14634 ,  H01L27/14643 ,  H01L27/14683 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An image sensor may include a first substrate having circuitry including wires and a silicon layer formed on and/or over the first substrate to selectively contact the wires. The image sensor may include photodiodes bonded to the first substrate while contacting the silicon layer and electrically connected to the wires. Each unit pixel may be implemented having complicated circuitry without a reduction in photosensitivity. Additional on-chip circuitry may also be implanted in the design.

Abstract translation: 图像传感器可以包括具有包括导线的电路的第一基板和形成在第一基板上和/或上方的硅层，以选择性地接触导线。 图像传感器可以包括在与硅层接触并且电连接到电线时结合到第一衬底的光电二极管。 可以实现每个单位像素具有复杂的电路而不降低光敏性。 还可以在设计中植入附加的片上电路。

公开(公告)号：US07537999B2

公开(公告)日：2009-05-26

申请号：US10746702

申请日：2003-12-24

Applicant: Chang Hun Han

Inventor： Chang Hun Han

IPC: H01L21/336

CPC classification number: H01L27/14689 ,  H01L27/14603 ,  H01L27/14643 ,  H01L31/035272

Abstract: A method for manufacturing structures of a CMOS image sensor. The method comprises the steps of depositing a gate insulating layer and a conductive layer on a semiconductor substrate; depositing an ion implantation barrier layer on the conductive layer; patterning the deposited gate insulating layer, conductive layer and ion implantation barrier layer to form a patterned, composite gate insulating layer, gate electrode and ion implantation barrier structure; forming a second photosensitive layer pattern to define a photodiode region; and implanting low-concentration dopant ions into the substrate using the second photosensitive layer pattern as an ion implantation mask to form a low-concentration dopant region within the photodiode region.

Abstract translation: 一种用于制造CMOS图像传感器的结构的方法。 该方法包括以下步骤：在半导体衬底上沉积栅绝缘层和导电层; 在导电层上沉积离子注入阻挡层; 图案化沉积的栅极绝缘层，导电层和离子注入阻挡层，以形成图案化的复合栅极绝缘层，栅电极和离子注入阻挡结构; 形成第二感光层图案以限定光电二极管区域; 以及使用所述第二感光层图案作为离子注入掩模将低浓度掺杂剂离子注入到所述衬底中，以在所述光电二极管区域内形成低浓度掺杂剂区域。

公开(公告)号：US07507635B2

公开(公告)日：2009-03-24

申请号：US11318434

申请日：2005-12-28

Applicant: Chang Hun Han

Inventor： Chang Hun Han

IPC: H01L21/76

CPC classification number: H01L27/14689 ,  H01L27/14603 ,  H01L27/1463

Abstract: A CMOS image sensor and method for fabricating the same, wherein the CMOS image sensor has minimized dark current at the boundary area between a photodiode and an isolation layer. The present invention includes a first-conductivity-type doping area formed in the device isolation area of the substrate, the first-conductivity-type doping area surrounding the isolation area and a dielectric layer formed between the isolation layer and the first-conductivity-type doping area, wherein the first-conductivity-type doping area and the dielectric layer are located between the isolation layer and a second-conductivity-type diffusion area.

Abstract translation: 一种CMOS图像传感器及其制造方法，其中CMOS图像传感器在光电二极管和隔离层之间的边界区域具有最小化的暗电流。 本发明包括在衬底的器件隔离区域中形成的第一导电型掺杂区域，围绕隔离区域的第一导电型掺杂区域和形成在隔离层和第一导电型之间的介电层 掺杂区域，其中所述第一导电型掺杂区域和所述介电层位于所述隔离层和第二导电型扩散区域之间。

公开(公告)号：US07411234B2

公开(公告)日：2008-08-12

申请号：US10747307

申请日：2003-12-30

Applicant: Chang Hun Han

Inventor： Chang Hun Han

IPC: H01L31/062 ,  H01L31/113

CPC classification number: H01L27/14689 ,  H01L27/14603 ,  H01L27/1463 ,  H01L27/14632 ,  H01L27/14643 ,  H01L27/14687

Abstract: A CMOS image sensor and a manufacturing method are disclosed. The gates of the transistors are formed in the active region of the unit pixel, and a diffusion region for the photo diode is defined by an ion implantation of impurities to the semiconductor substrate. The patterns of the photoresist that are the masking layer against ion implantation are formed on the semiconductor substrate in such a manner that they have the boundary portion of the isolation layer so as not to make the boundary of the defined photo diode contact with the boundary of the isolation layer. Damages by an ion implantation of impurities at the boundary portion between the diffusion region for the photo diode and the isolation layer are prevented, which reduces dark current of the COMS image sensor.

Abstract translation: 公开了CMOS图像传感器和制造方法。 晶体管的栅极形成在单位像素的有源区中，并且通过将杂质离子注入半导体衬底来限定用于光电二极管的扩散区。 作为抵抗离子注入的掩模层的光致抗蚀剂的图案以这样的方式形成在半导体衬底上，使得它们具有隔离层的边界部分，以便不使所定义的光电二极管的边界与 隔离层。 通过在光电二极管的扩散区域与隔离层之间的边界部分处的杂质的离子注入的损害被防止，这降低了COMS图像传感器的暗电流。

公开(公告)号：US07354789B2

公开(公告)日：2008-04-08

申请号：US10982643

申请日：2004-11-04

Applicant: Chang Hun Han

Inventor： Chang Hun Han

IPC: H01L21/00

CPC classification number: H01L27/14603 ,  H01L27/1463 ,  H01L27/14689

Abstract: CMOS image sensor and method for fabricating the same, the CMOS image sensor including a second conductive type semiconductor substrate having an active region and a device isolation region defined therein, wherein the active region has a photodiode region and a transistor region defined therein, a device isolating film in the semiconductor substrate of the device isolation region, a first conductive type impurity region in the semiconductor substrate of the photodiode region, the first conductive type impurity region being spaced a distance from the device isolation film, and a second conductive type first impurity region in the semiconductor substrate between the first conductive type impurity region and the device isolation film, thereby reducing generation of a darkcurrent at an interface between the photodiode region and a field region.

Abstract translation: CMOS图像传感器及其制造方法，CMOS图像传感器包括具有限定在其中的有源区和器件隔离区的第二导电型半导体衬底，其中有源区具有限定在其中的光电二极管区和晶体管区， 在器件隔离区域的半导体衬底中的隔离膜，在光电二极管区域的半导体衬底中的第一导电类型杂质区域，与器件隔离膜间隔一定距离的第一导电类型杂质区域和第二导电类型第一杂质 在第一导电型杂质区域和器件隔离膜之间的半导体衬底中的区域，从而减少在光电二极管区域和场区域之间的界面处的产生暗电流。

公开(公告)号：US07241671B2

公开(公告)日：2007-07-10

申请号：US11319067

申请日：2005-12-28

Applicant: Chang Hun Han

Inventor： Chang Hun Han

IPC: H01L21/38 ,  H01L21/76

CPC classification number: H01L27/14643 ,  H01L27/1463 ,  H01L27/14687 ,  H01L27/14689

Abstract: A CMOS image sensor includes a first conductive type semiconductor substrate having an active region and a device isolation region, a device isolation film formed in the device isolation region of the semiconductor substrate, a second conductive type diffusion region formed in the active region of the semiconductor substrate, and an ion implantation prevention layer formed in the vicinity of the device isolation film, including a boundary portion between the device isolation film and the second conductive type diffusion region.

Abstract translation: CMOS图像传感器包括具有有源区和器件隔离区的第一导电类型半导体衬底，形成在半导体衬底的器件隔离区中的器件隔离膜，形成在半导体的有源区中的第二导电型扩散区 衬底和形成在器件隔离膜附近的离子注入防止层，包括器件隔离膜和第二导电类型扩散区之间的边界部分。

公开(公告)号：US20060148176A1

公开(公告)日：2006-07-06

申请号：US11320687

申请日：2005-12-30

Applicant: Dong-Oog Kim ,  Chang-Hun Han

Inventor： Dong-Oog Kim ,  Chang-Hun Han

IPC: H01L21/336

CPC classification number: H01L27/115 ,  H01L27/11519 ,  H01L27/11521

Abstract: A method of manufacturing a gate in a flash memory device. The method includes forming a stacking structure including a tunnel oxide layer, a floating gate, a dielectric layer, and a control gate on a semiconductor substrate. The further includes removing a remaining portion of the tunnel oxide layer exposed by the control gate by wet etching to a degree that the semiconductor substrate is exposed, and forming an oxide layer covering the exposed portion of the semiconductor substrate and both sidewalls of the floating gate and the control gate.

Abstract translation: 一种在闪速存储器件中制造栅极的方法。 该方法包括在半导体衬底上形成包括隧道氧化物层，浮置栅极，电介质层和控制栅极的堆叠结构。 还包括通过湿蚀刻去除由控制栅极暴露的隧道氧化物层的剩余部分到半导体衬底暴露的程度，并且形成覆盖半导体衬底的暴露部分的氧化物层和浮置栅极的两个侧壁 和控制门。

公开(公告)号：US07056647B2

公开(公告)日：2006-06-06

申请号：US10749648

申请日：2003-12-30

Applicant: Sung Mun Jung ,  Chang Hun Han

Inventor： Sung Mun Jung ,  Chang Hun Han

IPC: G03C5/00

CPC classification number: H01L27/11526 ,  H01L27/105 ,  H01L27/11531

Abstract: A flash memory device having a reduced source resistance and a fabrication method thereof are disclosed. An example flash memory includes a cell region including a gate, a source line, a drain contact, and a cell trench area for device isolation on a silicon substrate. The example flash memory also includes a peripheral region positioned around the cell region and including a subsidiary circuit and a peripheral trench area for device isolation on the silicon substrate, wherein the cell trench area of the cell region is shallower than the peripheral trench area of the peripheral region.

Abstract translation: 公开了一种具有降低的源极电阻的闪存器件及其制造方法。 示例性闪存包括包括栅极，源极线，漏极接触和用于硅衬底上的器件隔离的沟道区域的单元区域。 示例性闪存还包括围绕单元区域定位的外围区域，并且包括用于在硅衬底上进行器件隔离的辅助电路和外围沟槽区域，其中，单元区域的单元沟槽区域比所述栅极区域的外围沟槽区域浅 周边地区。