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    Resistors and Methods of Manufacture Thereof
    113.
    发明申请
    Resistors and Methods of Manufacture Thereof 审中-公开
    电阻器及其制造方法

    公开(公告)号：US20100148262A1

    公开(公告)日：2010-06-17

    申请号：US12336702

    申请日：2008-12-17

    Applicant: Knut Stahrenberg ,  Karl-Heinz Bach ,  Manfred Eller ,  Roland Hampp ,  Jin-Ping Han ,  O Sung Kwon

    Inventor： Knut Stahrenberg ,  Karl-Heinz Bach ,  Manfred Eller ,  Roland Hampp ,  Jin-Ping Han ,  O Sung Kwon

    IPC: H01L29/772 ,  H01L21/02

    CPC classification number: H01L28/20 ,  H01L27/0629

    Abstract: Resistors, semiconductor devices, and methods of manufacture thereof are disclosed. In one embodiment, a method of fabricating a resistor includes forming a semiconductive material over a workpiece, and patterning at least the semiconductive material, forming a gate of a transistor in a first region of the workpiece and forming a resistor in a second region of the workpiece. At least one substance is implanted into the semiconductive material of the gate of the transistor or the resistor so that the semiconductive material is different for the gate of the transistor and the resistor.

    Abstract translation: 公开了电阻器，半导体器件及其制造方法。 在一个实施例中，制造电阻器的方法包括在工件上形成半导体材料，并且至少构图半导体材料，在工件的第一区域中形成晶体管的栅极，并在第二区域中形成电阻器 工件。 将至少一种物质注入到晶体管或电阻器的栅极的半导体材料中，使得半导体材料对于晶体管和电阻器的栅极是不同的。

    Light distribution board having improved grating structure including a plurality of light gratings each with multiple focuses
    115.
    发明申请
    Light distribution board having improved grating structure including a plurality of light gratings each with multiple focuses 审中-公开
    配光板具有改进的光栅结构，包括多个光栅，每个具有多个焦点

    公开(公告)号：US20100080007A1

    公开(公告)日：2010-04-01

    申请号：US12285028

    申请日：2008-09-29

    Applicant: Ping-Han Chuang

    Inventor： Ping-Han Chuang

    IPC: F21V5/04

    CPC classification number: F21V5/002 ,  F21V5/008 ,  F21V5/04 ,  F21V13/04

    Abstract: A light distribution board having an improved light grating structure including a plurality of light gratings each with multiple focuses, the light distribution board is used on a light outputting surface of a lamp, in which at least a transparent board is provided on at least one of its surfaces with a plurality of light gratings each having multiple focuses, each light grating having multiple focuses is composed of two or more arciform (concave or convex) lenses and at least one lens with a non-arciform surface to form a light grating having at least two focuses. With this structure, light beams can be uniformly distributed and can avoid the phenomenon of Gauss distribution that makes the area below the lamp especially bright, and avoid the phenomenon of dazzling of eyes during looking at the light emitting member in the lamp, and the light beams become more tender under the condition that lose of brightness is minimum.

    Abstract translation: 一种配光板，其具有改进的光栅结构，其包括多个具有多个焦点的光栅，所述配光板用于灯的光输出表面，其中至少一个透明板设置在至少一个透明板上， 其表面具有多个具有多个焦点的光栅，每个具有多个焦点的光栅由两个或更多个弧形（凹或凸）透镜和至少一个具有非弧形表面的透镜组成，以形成具有 至少两个焦点。 通过这种结构，光束可以均匀分布，并且可以避免高斯分布的现象，使得灯下面的区域特别亮，并且避免在观察灯中的发光构件时眼睛耀眼的现象，并且光 在亮度损失最小的条件下，光束变得更柔嫩。

    Semiconductor Devices and Methods of Manufacture Thereof
    116.
    发明申请
    Semiconductor Devices and Methods of Manufacture Thereof 有权
    半导体器件及其制造方法

    公开(公告)号：US20100065922A1

    公开(公告)日：2010-03-18

    申请号：US12626496

    申请日：2009-11-25

    Applicant: Jin-Ping Han ,  Thomas W. Dyer ,  Henry Utomo ,  Rajendran Krishnasamy

    Inventor： Jin-Ping Han ,  Thomas W. Dyer ,  Henry Utomo ,  Rajendran Krishnasamy

    IPC: H01L29/78

    CPC classification number: H01L29/6656 ,  H01L21/76232 ,  H01L21/823481 ,  H01L21/823878 ,  H01L29/165 ,  H01L29/41775 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833

    Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a method of manufacturing a semiconductor device includes providing a semiconductor wafer, forming at least one isolation structure within the semiconductor wafer, and forming at least one feature over the semiconductor wafer. A top portion of the at least one isolation structure is removed, and a liner is formed over the semiconductor wafer, the at least one feature, and the at least one isolation structure. A fill material is formed over the liner. The fill material and the liner are removed from over at least a portion of a top surface of the semiconductor wafer.

    Abstract translation: 公开了半导体器件及其制造方法。 在优选实施例中，制造半导体器件的方法包括提供半导体晶片，在半导体晶片内形成至少一个隔离结构，并在半导体晶片上形成至少一个特征。 移除所述至少一个隔离结构的顶部，并且在所述半导体晶片，所述至少一个特征以及所述至少一个隔离结构之上形成衬垫。 在衬套上形成填充材料。 填充材料和衬垫从半导体晶片的顶表面的至少一部分上方被去除。

    CHANNEL STRAIN ENGINEERING IN FIELD-EFFECT-TRANSISTOR
    118.
    发明申请
    CHANNEL STRAIN ENGINEERING IN FIELD-EFFECT-TRANSISTOR 有权
    场效应晶体管中的通道应变工程

    公开(公告)号：US20080305621A1

    公开(公告)日：2008-12-11

    申请号：US11760056

    申请日：2007-06-08

    Applicant: Thomas Dyer ,  Rajendran Krishnasamy ,  Jin-Ping Han ,  Ernst Demm

    Inventor： Thomas Dyer ,  Rajendran Krishnasamy ,  Jin-Ping Han ,  Ernst Demm

    IPC: H01L21/3205

    CPC classification number: H01L29/7845 ,  H01L21/28026 ,  H01L21/28079 ,  H01L21/823807 ,  H01L29/165 ,  H01L29/49 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7843 ,  H01L29/7848

    Abstract: There is disclosed a method of applying stress to a channel region underneath a gate of a field-effect-transistor, which includes the gate, a source region, and a drain region. The method includes steps of embedding stressors in the source and drain regions of the FET; forming a stress liner covering the gate and the source and drain regions; removing a portion of the stress liner, the portion of the stress liner being located on top of the gate of the FET; removing at least a substantial portion of the gate of a first gate material and thus creating an opening therein; and filling the opening with a second gate material.

    Abstract translation: 公开了一种对包括栅​​极，源极区和漏极区的场效应晶体管的栅极下面的沟道区域施加应力的方法。 该方法包括以下步骤：将应力源嵌入在FET的源极和漏极区域中; 形成覆盖所述栅极和所述源极和漏极区域的应力衬垫; 去除所述应力衬垫的一部分，所述应力衬垫的所述部分位于所述FET的栅极顶部; 去除第一栅极材料的栅极的至少大部分，从而在其中形成开口; 并用第二栅极材料填充开口。

    Electronic environment sensing instrument having an analog indicator
    119.
    发明授权
    Electronic environment sensing instrument having an analog indicator 失效
    具有模拟指示器的电子环境感测仪器

    公开(公告)号：US07284455B2

    公开(公告)日：2007-10-23

    申请号：US11108675

    申请日：2005-04-19

    Applicant: Ping-Han Lee ,  Li-Zhen Wang

    Inventor： Ping-Han Lee ,  Li-Zhen Wang

    IPC: G01D11/24 ,  G06M1/06 ,  G01F15/06 ,  B27D5/22

    CPC classification number: G01D13/22 ,  G01D7/00

    Abstract: An electronic environment sensing instrument having an analog indicator has a casing having a front panel with a scale, an electronic sensing and driving assembly mounted in the casing, a needle and a DC power supply. The electronic driving indicator assembly has a detecting and driving circuit to sense and measure an environmental parameter outside the casing and generates a control signal, a drive unit to receive the control signal and rotate a specific amount in a specific direction based on the control signal and a gear assembly connected to and driven by the drive unit. The needle is attached to and driven by the gear assembly and points to a specific value on the scale corresponding to the sensed environmental parameter.

    Abstract translation: 具有模拟指示器的电子环境感测装置具有壳体，其具有带有刻度的前面板，安装在壳体中的电子感测和驱动组件，针和直流电源。 电子驱动指示器组件具有检测和驱动电路，用于感测和测量壳体外部的环境参数，并产生控制信号;驱动单元，用于接收控制信号，并基于控制信号沿特定方向旋转特定量;以及 连接到驱动单元并由驱动单元驱动的齿轮组件。 针被齿轮组件附接并驱动，并且指向对应于所感测的环境参数的刻度上的特定值。

    Semiconductor devices and methods of manufacturing thereof
    120.
    发明申请
    Semiconductor devices and methods of manufacturing thereof 有权
    半导体器件及其制造方法

    公开(公告)号：US20070196996A1

    公开(公告)日：2007-08-23

    申请号：US11356666

    申请日：2006-02-17

    Applicant: Jin-Ping Han ,  Yung Chong

    Inventor： Jin-Ping Han ,  Yung Chong

    IPC: H01L21/76

    CPC classification number: H01L21/823807 ,  H01L21/76232 ,  H01L21/823878 ,  H01L29/7846

    Abstract: Semiconductor devices and methods of manufacturing thereof are disclosed. Isolation regions are formed that include a stress-altering material at least partially lining a trench formed within a workpiece. The isolation regions include an insulating material disposed over the stress-altering material.

    Abstract translation: 公开了半导体器件及其制造方法。 形成隔离区域，其包括至少部分地衬在工件内形成的沟槽的应力改变材料。 隔离区域包括设置在应力变化材料上方的绝缘材料。

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