Abstract:
An output buffer with an offset cancellation structure for an LCD source driver includes an operational amplifier, for driving an output signal of the output buffer according to a data signal from a data input terminal of the output buffer; a reference voltage generator, for generating a reference voltage and inputting the reference voltage to the operational amplifier; and a sampling capacitor, coupled between a second input terminal of the operational amplifier and the data input terminal of the output buffer in a first phase, and coupled between the second input terminal of the operational amplifier and an output terminal of the operational amplifier in a second phase, wherein the second input terminal of the operational amplifier is further coupled to the output terminal of the operational amplifier in the first phase. The output signal outputs the data signal where the offset voltage is cancelled in the second phase.
Abstract:
A driving circuit for a display includes a logic unit and a memory array coupled to the logic unit for turning on a plurality of memory cells corresponding to the word-line according to a word-line scanning signal to refresh the plurality of memory cells corresponding to the word-line; wherein the memory array has a first number of bit-lines and a second number of word-lines, wherein the driving circuit is used for driving a display panel having a third number of data-lines and a fourth number of scan-lines, and a product of the first number and the second number is equal to a product of the third number and the fourth number.
Abstract:
The present disclosure provides a capacitor voltage information sensing circuit. The capacitor voltage information sensing circuit includes a mixer and an analog filter. The mixer includes a first input terminal for receiving a reference signal, a second input terminal for receiving a voltage signal, the voltage signal includes capacitor voltage information and a noise when a touch occurs, a first output terminal for outputting a first differential signal according to the voltage signal and the reference signal, and a second output terminal for outputting a second differential signal according to the voltage signal and the reference signal. The analog filter is coupled to the mixer for generating a first low-frequency signal and a second low-frequency signal according to the first differential signal and second differential signal.
Abstract:
A driving module, for a display device, includes a first transistor comprising a gate coupled to a first node, a drain coupled to an output end, and a source coupled to a first positive voltage source; a second transistor comprising a gate coupled to a second node, a drain coupled to the output end, and a source coupled to a first negative voltage source; and a voltage generating unit, coupled to an input end, a second positive voltage source and a second negative voltage source for generating a first voltage at the first node and a second voltage at the second node; wherein a difference between a first positive voltage of the first positive voltage source and the first voltage is smaller than a first threshold and a difference between a first negative voltage of the first negative voltage source and the second voltage is smaller than a second threshold.
Abstract:
A circuit buffer for outputting a voltage signal having a magnitude greater than a withstand voltage of any circuit element in the circuit buffer includes a first transistor and a second transistor. The first transistor includes a first terminal and a second terminal electrically connected to an input terminal and an output terminal of the circuit buffer respectively, a third terminal electrically connected to a first power supply terminal, and a fourth terminal electrically connected to the third terminal of the first transistor. The second transistor includes a first terminal and a second terminal electrically connected to the input terminal and the output terminal of the circuit buffer respectively, a third terminal electrically connected to a second power supply terminal, and a fourth terminal electrically connected to the third terminal of the second transistor. Voltages of the first and second power supply terminal are switched between two different levels, respectively.
Abstract:
The present invention relates to a voltage boosting circuit capable of modulating duty cycle automatically, which comprises an inductor, a switching module, and a control circuit. The inductor is coupled to an input for receiving an input power. The switching module is coupled among the inductor, a ground, and an output for switching so that the input power can charge the inductor and produce charged energy, or for switching so that the charged energy of the inductor can discharge to the output and produce an output voltage. The control circuit outputs at least a control signal according to the charged energy and the output voltage for controlling the switching module to switch the inductor and provide the input power to the output, to switch the charged energy of the inductor to discharge to the output, or to switch the input power to charge the inductor.
Abstract:
The present invention discloses a power circuit having multiple stages of charge pumps. The power circuit comprises a first charge pump, a second charge pump, a voltage stabilizing capacitor, and an output capacitor. The first charge pump adjusts an input voltage and produces a first output voltage. The second charge pump adjusts the first output voltage, produces a second output voltage, and outputs the second output voltage for driving a loading. The voltage stabilizing capacitor is coupled between the first and second charge pumps and connected externally to the output of the first charge pump. The output capacitor is coupled to the second charge pump for providing the second output voltage. According to the present invention, the effect of supplying large transient currents to the loading can be achieved by connecting externally the voltage stabilizing capacitor to the output of the first charge pump.
Abstract:
The present invention relates to an analog-to-digital converting circuit with temperature sensing and the electronic device thereof. The present invention uses a first impedance device to receive a reference voltage and produces an input current according to a temperature. An analog-to-digital converting unit is coupled to the first impedance device and produces a digital output signal according to the input current. Thereby, according to the present invention, by integrating the first impedance device into the analog-to-digital converting circuit, the circuit area and the power consumption can be lowered, which further reduces the cost and improves the accuracy of temperature sensing.
Abstract:
The present invention relates to an area-saving driving circuit for a display panel, which comprises a plurality of digital-to-analog converting circuits convert input data, respectively, and produce a pixel signal. A plurality of driving units are coupled to the plurality of digital-to-analog converting circuits, respectively. They produce a driving signal according to the pixel signal and transmit the driving signal to the display panel for displaying. A plurality of voltage booster units are coupled to the plurality of driving units, respectively, and produce a supply voltage according to a control signal. Then the supply voltage is provided to the plurality of driving units. Thereby, by providing the supply voltage to the plurality of driving units of the display panel by means of the plurality of voltage booster units, the area of the external storage capacitor is reduced. Alternative, the external storage capacitor can be even not required.
Abstract:
The present invention relates to a transmission interface device capable of calibrating the transmission frequency automatically, which comprises a clock generating unit, a data transmission unit, and a control unit. The clock generating unit is used for generating an operating clock, which determines a transmission frequency. The data transmission unit is used for connecting to a host and transmitting a plurality of data to the host or receiving the plurality of data from the host according to the operating clock. When the host or the data transmission unit detects transmission errors in the plurality of data, the host or the data transmission unit generates an error handling. The control unit generates an adjusting signal according to the error handling and transmits the adjusting signal to the clock generating unit for adjusting the transmission frequency of the operating clock.